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Ultra clean processing of semiconductor surfaces XI : selected, peer reviewed papers from the 11th international symposium on ultra clean processing of semiconductor surfaces (UCPSS), September 17-19, 2012, Gent, Belgium /
This volume covers various aspects of ultra-clean technology for the large-scale integration of semiconductors. These include cleaning and contamination control in both front-end-of-line (FEOL) and back-end-of-line (BEOL) processing, as well as cleaning for semiconductor photo-voltaic applications....
| Clasificación: | Libro Electrónico |
|---|---|
| Autor Corporativo: | |
| Otros Autores: | , , |
| Formato: | Electrónico Congresos, conferencias eBook |
| Idioma: | Inglés |
| Publicado: |
Durnten-Zurich, Switzerland :
Trans Tech Publications Ltd.,
[2013]
|
| Colección: | Diffusion and defect data. Solid state phenomena ;
v. 195. |
| Temas: | |
| Acceso en línea: | Texto completo |
MARC
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| 111 | 2 | |a International Symposium on Ultra Clean Processing of Semiconductor Surfaces |n (11th : |d 2012 : |c Ghent, Belgium) | |
| 245 | 1 | 0 | |a Ultra clean processing of semiconductor surfaces XI : |b selected, peer reviewed papers from the 11th international symposium on ultra clean processing of semiconductor surfaces (UCPSS), September 17-19, 2012, Gent, Belgium / |c edited by Paul Mertens, Marc Meuris and Marc Heyns. |
| 246 | 3 | |a UCPSS 2012 | |
| 264 | 1 | |a Durnten-Zurich, Switzerland : |b Trans Tech Publications Ltd., |c [2013] | |
| 264 | 4 | |c ©2013 | |
| 300 | |a 1 online resource (328 pages) : |b illustrations (black and white) | ||
| 336 | |a text |b txt |2 rdacontent | ||
| 337 | |a computer |b c |2 rdamedia | ||
| 338 | |a online resource |b cr |2 rdacarrier | ||
| 490 | 1 | |a Solid state phenomena, |x 1012-0394 ; |v v. 195 | |
| 504 | |a Includes bibliographical references and index. | ||
| 588 | 0 | |a Online resource; title from PDF title page (ebrary, viewed November 1, 2013). | |
| 505 | 0 | |a Ultra Clean Processing of Semiconductor Surfaces XI; Preface, Committees and Acknowledgements; Table of Contents; Keynote; Silicon & beyond CMOS: The Path of Advanced Electronic Structure Engineering for Low-Voltage Transistors; Chapter 1: Cleaning for FEOL Applications; Cleaning Technology for Advanced Devices beyond 20 nm Node; Dummy Oxide Removal in High-K Last Process Integration how to Avoid Silicon Corrosion Issue; Implanted Photoresist Remover for Advanced Nodes Including SiGe, Ge and High K-Metals; Development of a Integrated Dry/Wet Hybrid Cleaning System. | |
| 505 | 8 | |a New Chemical Vapor Delivery Systems for Surface CleaningRemoval of UV Cured Resin Using Hybrid Cleaning Method; Chapter 2: Wet Etching; Selective Nickel Silicide Wet Etchback Chemistry for Low Temperature Anneal Process; Wet Etching Behavior of Poly-Si in TMAH Solution; Novel Wet Etching of Silicon Nitride in a Single Wafer Spin Processor; Selective Nitride Etch by Using Fluorides in High Boiling Point Solvent; SiO2 Etch Rate Modification by Ion Implantation; Surface Preparations Impact on 248nm Deep UV Photo Resists Adhesion during a Wet Etch. | |
| 505 | 8 | |a Chapter 3: Surface Chemistry and FunctionalisationChemical Control of Surfaces: From Fundamental Understanding to Practical Application; Surface Preparation of Poly-Si Using Dry Cleaning for Minimizing Interfacial Resistance; A Comparative Study for the Backside Illumination (BSI) Technology Using Bonding Wafer Cleaning Process for Advanced CMOS Image Sensor; Clean Process Mechanism of HKMG during N-PMOS Patterning; Study of Highly Selective and Sensitive Microarray Structure Based on Hydrophilic/Hydrophobic SAMs (Self-Assembled Monolayers); Evaluation of CD Fluctuation on QC Monitor. | |
| 505 | 8 | |a In Situ Studies of III-V Surfaces and High-K Atomic Layer DepositionALD Growth Behavior of High-K Nanolayers on Various Substrates Characterized by X-Ray Spectrometry in Gracing Incidence Geometry; Cleaning of III-V Materials: Surface Chemistry Considerations; Chapter 4: Cleaning for BEOL and 3D Applications; Unique Size-Dependent Challenges for BEOL Cleans in the Patterning of Sub-20 nm Features; The Risk of Pattern Collapse for Structures in Future Logic Devices. | |
| 505 | 8 | |a Determination of Surface Energy Characteristics of Plasma Processed Ultra Low-K Dielectrics for Optimized Wetting in Wet Chemical Plasma Etch Residue RemovalWet Removal of Post-Etch Residues by a Combination of UV Irradiation and a SC1 Process; Analysis of Oxidized Copper Surface and its Evolution; Introduction of a Dynamic Corrosion Inhibitor for Copper Interconnect Cleaning; Removing W Polymer Residue from BEOL Structures Using DSP+ (Dilute Sulfuric-Peroxide-HF) Mixture -- A Case Study. | |
| 520 | |a This volume covers various aspects of ultra-clean technology for the large-scale integration of semiconductors. These include cleaning and contamination control in both front-end-of-line (FEOL) and back-end-of-line (BEOL) processing, as well as cleaning for semiconductor photo-voltaic applications. Also covered are studies of general topics such as particle removal using acoustic enhancement, the removal of metallic contamination, pattern collapse of fine flexible and fragile features, wetting and drying, contamination control and contamination metrology. The FEOL and BEOL contributions also t. | ||
| 506 | |a Access restricted to Ryerson students, faculty and staff. |5 CaOTR | ||
| 590 | |a eBooks on EBSCOhost |b EBSCO eBook Subscription Academic Collection - Worldwide | ||
| 590 | |a Knovel |b ACADEMIC - Electronics & Semiconductors | ||
| 650 | 0 | |a Electrical engineering |v Congresses. | |
| 650 | 0 | |a Semiconductors |x Surfaces |v Congresses. | |
| 650 | 6 | |a Génie électrique |v Congrès. | |
| 650 | 6 | |a Semi-conducteurs |x Surfaces |v Congrès. | |
| 650 | 7 | |a SCIENCE |x Physics |x Electricity. |2 bisacsh | |
| 650 | 7 | |a SCIENCE |x Physics |x Electromagnetism. |2 bisacsh | |
| 650 | 7 | |a Electrical engineering |2 fast | |
| 650 | 7 | |a Semiconductors |x Surfaces |2 fast | |
| 655 | 7 | |a Conference papers and proceedings |2 fast | |
| 700 | 1 | |a Heyns, Marc. | |
| 700 | 1 | |a Mertens, Paul. | |
| 700 | 1 | |a Meuris, Marc. | |
| 776 | 0 | 8 | |i Print version: |t Ultra clean processing of semiconductor surfaces XI. |d Durnten-Zurich, Switzerland ; Trans Tech Publications, [2013] |h xiv, 332 pages : illustrations (black and white) ; 24 cm. |k Diffusion and defect data. Pt. B, Solid state phenomena ; v. 195 |z 9783037855270 |z 3037855274 |w (DLC) 2012538789 |
| 830 | 0 | |a Diffusion and defect data. |n Pt. B, |p Solid state phenomena ; |v v. 195. | |
| 856 | 4 | 0 | |u https://appknovel.uam.elogim.com/kn/resources/kpUCPSSXI2/toc |z Texto completo |
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