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|a Lilja, David J.
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|a Designing digital computer systems with Verilog /
|c David J. Lilja and Sachin S. Sapatnekar.
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|a Cambridge, UK ;
|a New York :
|b Cambridge University Press,
|c 2005.
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300 |
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|a 1 online resource (ix, 160 pages) :
|b illustrations
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|a text
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|a Includes bibliographical references and index.
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|a Print version record.
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|a This book serves both as an introduction to computer architecture and as a guide to using a hardware description language (HDL) to design, model and simulate real digital systems. The book starts with an introduction to Verilog - the HDL chosen for the book since it is widely used in industry and straightforward to learn. Next, the instruction set architecture (ISA) for the simple VeSPA (Very Small Processor Architecture) processor is defined - this is a real working device that has been built and tested at the University of Minnesota by the authors. The VeSPA ISA is used throughout the remainder of the book to demonstrate how behavioural and structural models can be developed and intermingled in Verilog. Although Verilog is used throughout, the lessons learned will be equally applicable to other HDLs. Written for senior and graduate students, this book is also an ideal introduction to Verilog for practising engineers.
|
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|a Knovel
|b ACADEMIC - Computer Hardware Engineering
|
650 |
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|a Verilog (Computer hardware description language)
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650 |
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|a Electronic digital computers
|x Design and construction.
|
650 |
|
6 |
|a Verilog (Langage de description de matériel informatique)
|
650 |
|
7 |
|a Electronic digital computers
|x Design and construction.
|2 fast
|0 (OCoLC)fst00907142
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650 |
|
7 |
|a Verilog (Computer hardware description language)
|2 fast
|0 (OCoLC)fst01165388
|
700 |
1 |
|
|a Sapatnekar, Sachin S.,
|d 1967-
|
776 |
0 |
8 |
|i Print version:
|a Lilja, David J.
|t Designing digital computer systems with Verilog.
|d Cambridge, UK ; New York : Cambridge University Press, 2005
|z 052182866X
|w (DLC) 2004054515
|w (OCoLC)755910639
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|u https://appknovel.uam.elogim.com/kn/resources/kpDDCSV003/toc
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