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On-chip communication architectures : system on chip interconnect /
Over the past decade, system-on-chip (SoC) designs have evolved to address the ever increasing complexity of applications, fueled by the era of digital convergence. Improvements in process technology have effectively shrunk board-level components so they can be integrated on a single chip. New on-ch...
| Clasificación: | Libro Electrónico |
|---|---|
| Autor principal: | |
| Otros Autores: | |
| Formato: | Electrónico eBook |
| Idioma: | Inglés |
| Publicado: |
Amsterdam ; Boston :
Elsevier / Morgan Kaufmann Publishers,
©2008.
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| Colección: | Morgan Kaufmann series in systems on silicon.
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| Temas: | |
| Acceso en línea: | Texto completo |
MARC
| LEADER | 00000cam a2200000 a 4500 | ||
|---|---|---|---|
| 001 | KNOVEL_ocn228148474 | ||
| 003 | OCoLC | ||
| 005 | 20231027140348.0 | ||
| 006 | m o d | ||
| 007 | cr cn||||||||| | ||
| 008 | 080516s2008 ne a ob 001 0 eng d | ||
| 040 | |a OPELS |b eng |e pn |c OPELS |d IDEBK |d OCLCQ |d B24X7 |d N$T |d E7B |d UMI |d CEF |d NHM |d DEBSZ |d KNOVL |d OCLCQ |d KNOVL |d OCLCF |d OCLCQ |d KNOVL |d YDXCP |d OCLCQ |d COO |d OCLCQ |d OTZ |d OCLCQ |d U3W |d D6H |d OCLCQ |d AU@ |d WYU |d OCLCQ |d UAB |d MERER |d CUY |d LEAUB |d OCLCQ |d OL$ |d VT2 |d OCLCQ |d EYM |d OCLCQ |d OCLCO |d VLY |d OCLCO |d OCLCQ |d OCLCO | ||
| 019 | |a 247359396 |a 435501529 |a 646750814 |a 712978532 |a 772078383 |a 994685819 |a 1044565314 |a 1056388022 |a 1063974876 |a 1075546064 |a 1103262601 |a 1129378233 |a 1153023900 |a 1162262657 |a 1192349480 |a 1240512363 | ||
| 020 | |a 9780123738929 | ||
| 020 | |a 012373892X | ||
| 020 | |a 9780080558288 |q (electronic bk.) | ||
| 020 | |a 0080558283 |q (electronic bk.) | ||
| 020 | |a 1281370940 | ||
| 020 | |a 9781281370945 | ||
| 020 | |a 9786611370947 | ||
| 020 | |a 6611370943 | ||
| 029 | 1 | |a AU@ |b 000043178402 | |
| 029 | 1 | |a CHNEW |b 001007597 | |
| 029 | 1 | |a DEBBG |b BV039829434 | |
| 029 | 1 | |a DEBBG |b BV042305718 | |
| 029 | 1 | |a DEBSZ |b 355395177 | |
| 029 | 1 | |a DEBSZ |b 367750236 | |
| 029 | 1 | |a HEBIS |b 291468411 | |
| 029 | 1 | |a NZ1 |b 12541550 | |
| 029 | 1 | |a NZ1 |b 15189661 | |
| 029 | 1 | |a NZ1 |b 15595565 | |
| 035 | |a (OCoLC)228148474 |z (OCoLC)247359396 |z (OCoLC)435501529 |z (OCoLC)646750814 |z (OCoLC)712978532 |z (OCoLC)772078383 |z (OCoLC)994685819 |z (OCoLC)1044565314 |z (OCoLC)1056388022 |z (OCoLC)1063974876 |z (OCoLC)1075546064 |z (OCoLC)1103262601 |z (OCoLC)1129378233 |z (OCoLC)1153023900 |z (OCoLC)1162262657 |z (OCoLC)1192349480 |z (OCoLC)1240512363 | ||
| 037 | |a 137171:137307 |b Elsevier Science & Technology |n http://www.sciencedirect.com | ||
| 050 | 4 | |a TK7895.E42 |b P4 2008eb | |
| 072 | 7 | |a TEC |x 008020 |2 bisacsh | |
| 072 | 7 | |a TEC |x 008010 |2 bisacsh | |
| 082 | 0 | 4 | |a 621.3815 |2 22 |
| 049 | |a UAMI | ||
| 100 | 1 | |a Pasricha, Sudeep. | |
| 245 | 1 | 0 | |a On-chip communication architectures : |b system on chip interconnect / |c Sudeep Pasricha, Nikil Dutt. |
| 260 | |a Amsterdam ; |a Boston : |b Elsevier / Morgan Kaufmann Publishers, |c ©2008. | ||
| 300 | |a 1 online resource (xvii, 522 pages) : |b illustrations | ||
| 336 | |a text |b txt |2 rdacontent | ||
| 337 | |a computer |b c |2 rdamedia | ||
| 338 | |a online resource |b cr |2 rdacarrier | ||
| 490 | 1 | |a Systems on Silicon | |
| 520 | |a Over the past decade, system-on-chip (SoC) designs have evolved to address the ever increasing complexity of applications, fueled by the era of digital convergence. Improvements in process technology have effectively shrunk board-level components so they can be integrated on a single chip. New on-chip communication architectures have been designed to support all inter-component communication in a SoC design. These communication architecture fabrics have a critical impact on the power consumption, performance, cost and design cycle time of modern SoC designs. As application complexity strains the communication backbone of SoC designs, academic and industrial R & D efforts and dollars are increasingly focused on communication architecture design. This book is a comprehensive reference on concepts, research and trends in on-chip communication architecture design. It will provide readers with a comprehensive survey, not available elsewhere, of all current standards for on-chip communication architectures. KEY FEATURES * A definitive guide to on-chip communication architectures, explaining key concepts, surveying research efforts and predicting future trends * Detailed analysis of all popular standards for on-chip communication architectures * Comprehensive survey of all research on communication architectures, covering a wide range of topics relevant to this area, spanning the past several years, and up to date with the most current research efforts * Future trends that with have a significant impact on research and design of communication architectures over the next several years. | ||
| 505 | 0 | |a An Overview of System-on-Chips; Need for Communication-centric Design Flow; Basic Concepts of Bus-based Communication Architectures; Bus-based Communication Architecture Specification Standards; Limitations of Current Design Approaches; Physical and Electrical Analysis; Models for Performance Exploration; Power/Energy Exploration; Design and Synthesis of Communication Architectures; Innovative Aspects; Dynamic Bus Reconfiguration; Bus Encoding Techniques; Interface Synthesis and Optimization; Secure On-chip Communication Infrastructure; Verification; Custom Bus Design; Open Problems; Network-on-Chips; Optical Interconnects; Wireless Interconnects; Physical Design Trends. | |
| 504 | |a Includes bibliographical references and index. | ||
| 588 | 0 | |a Print version record. | |
| 546 | |a English. | ||
| 590 | |a O'Reilly |b O'Reilly Online Learning: Academic/Public Library Edition | ||
| 590 | |a Knovel |b ACADEMIC - Computer Hardware Engineering | ||
| 650 | 0 | |a Systems on a chip. | |
| 650 | 0 | |a Microcomputers |x Buses. | |
| 650 | 0 | |a Computer architecture. | |
| 650 | 0 | |a Interconnects (Integrated circuit technology) | |
| 650 | 6 | |a Systèmes sur une puce. | |
| 650 | 6 | |a Micro-ordinateurs |x Bus. | |
| 650 | 6 | |a Ordinateurs |x Architecture. | |
| 650 | 6 | |a Interconnexions (Technologie des circuits intégrés) | |
| 650 | 7 | |a TECHNOLOGY & ENGINEERING |x Electronics |x Circuits |x Integrated. |2 bisacsh | |
| 650 | 7 | |a TECHNOLOGY & ENGINEERING |x Electronics |x Circuits |x General. |2 bisacsh | |
| 650 | 7 | |a Systems on a chip. |2 blmlsh | |
| 650 | 7 | |a Microcomputers |x Buses. |2 blmlsh | |
| 650 | 7 | |a Computer architecture. |2 blmlsh | |
| 650 | 7 | |a Interconnects (Integrated circuit technology) |2 blmlsh | |
| 650 | 7 | |a Computer architecture |2 fast | |
| 650 | 7 | |a Interconnects (Integrated circuit technology) |2 fast | |
| 650 | 7 | |a Microcomputers |x Buses |2 fast | |
| 650 | 7 | |a Systems on a chip |2 fast | |
| 650 | 7 | |a Systèmes sur puce. |2 ram | |
| 650 | 7 | |a Circuits intégrés. |2 ram | |
| 650 | 7 | |a Architecture des ordinateurs. |2 ram | |
| 700 | 1 | |a Dutt, Nikil. | |
| 776 | 0 | 8 | |i Print version: |a Pasricha, Sudeep. |t On-chip communication architectures. |d Amsterdam ; Boston : Elsevier / Morgan Kaufmann Publishers, ©2008 |z 9780123738929 |z 012373892X |w (DLC) 2008004691 |w (OCoLC)176924796 |
| 830 | 0 | |a Morgan Kaufmann series in systems on silicon. | |
| 856 | 4 | 0 | |u https://appknovel.uam.elogim.com/kn/resources/kpOCCASCI3/toc |z Texto completo |
| 938 | |a Books 24x7 |b B247 |n bke00032340 | ||
| 938 | |a ebrary |b EBRY |n ebr10231708 | ||
| 938 | |a EBSCOhost |b EBSC |n 230786 | ||
| 938 | |a ProQuest MyiLibrary Digital eBook Collection |b IDEB |n 137094 | ||
| 938 | |a YBP Library Services |b YANK |n 2843774 | ||
| 994 | |a 92 |b IZTAP | ||