Pipelined analog to digital converter and fault diagnosis /

Pipelined architecture analog-to-digital converters (ADCs) have become the architecture of choice for high speed and moderate to high resolution devices. Subsequently, different techniques of the fault diagnosis by built in self-test (BIST) system have been developed. This book gives a rigorous, the...

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Detalles Bibliográficos
Clasificación:Libro Electrónico
Otros Autores: Barua, Alok (Editor )
Formato: Electrónico eBook
Idioma:Inglés
Publicado: Bristol [England] (Temple Circus, Temple Way, Bristol BS1 6HG, UK) : IOP Publishing, [2020]
Colección:IOP ebooks. 2020 collection.
Temas:
Analog-to-digital converters.
Analog-to-digital converters > Testing.
Circuits & components.
TECHNOLOGY & ENGINEERING / Electronics / Circuits / VLSI & ULSI.
Acceso en línea:Texto completo
Tabla de Contenidos:
  • 1. A 1.8 V, 10 bit, 500 mega samples per second parallel pipelined analog-to-digital converter
  • 1.1. Introduction
  • 1.2. Pipelined analog-to-digital converter architecture
  • 1.3. Operational transconductance amplifier (OTA)
  • 1.4. Sample-and-hold amplifier
  • 1.5. Multiplying digital-to-analog converter (MDAC)
  • 1.6. Comparator
  • 1.7. Conclusion
  • 2. A. built-in self-test for a 1.8 V, 8 bit, 125 mega samples per second pipelined analog-to-digital converter
  • 2.1. Organization of the chapter
  • 2.2. Specifications of the pipelined ADC
  • 2.3. Motivation and aims
  • 2.4. Pipelined ADC architecture
  • 2.5. A MATLAB model of the pipelined ADC
  • 2.6. Results obtained in the Cadence environment
  • 2.7. Built-in self-test (BIST) system
  • 2.8. Simulation of the pipelined ADC
  • 2.9. Future work
  • 3. Design of an oscillation-based built-in self-test system for a 1.8 V, 8 bit, 125 mega samples per second pipelined analog-to-digital converter
  • 3.1. Introduction
  • 3.2. Oscillation-based BIST principles
  • 3.3. Implementation of oscillation-based BIST
  • 3.4. Introduction to ADC dynamic testing
  • 3.5. Conclusion
  • 4. An oscillation-based built-in self-test (BIST) system for dynamic performance parameter evaluation of an 8 bit, 100 MSPS pipelined ADC
  • 4.1. Introduction
  • 4.2. Oscillation-based BIST principles
  • 4.3. Test stimulus generation
  • 4.4. OTA-C filter
  • 4.5. Dynamic parameter evaluation of a pipelined ADC
  • 4.6. Fault analysis using the BIST system
  • 4.7. Preparation of the layout and post-layout simulations
  • 4.8. Conclusion
  • 5. A reconfigurable built-in self-test architecture for a pipelined ADC
  • 5.1. Introduction
  • 5.2. The pipelined ADC
  • 5.3. Oscillation-based built-in self-test system
  • 5.4. Implementation of the ADC and OBIST
  • 5.5. Conclusion.

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