Reversible logic circuits /

In the conventional combination of logic circuits, energy loss is an important consideration. Research on reversible logic circuits are of interest to power minimization having applications in low power CMOS design, DNA computing, bioinformatics, nanotechnology, information security and so on. In th...

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Detalles Bibliográficos
Clasificación:Libro Electrónico
Autores principales: Zhou, Ri-Gui (Autor), Jing, Naihuan (Autor)
Formato: Electrónico eBook
Idioma:Inglés
Publicado: New York : Nova Science Publishers, Inc., [2015]
Colección:Electrical engineering developments series.
Temas:
Logic circuits.
Reversible computing.
Circuits logiques.
Calcul réversible.
TECHNOLOGY & ENGINEERING > Mechanical.
Acceso en línea:Texto completo

MARC

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100 1 |a Zhou, Ri-Gui,  |e author. 
245 1 0 |a Reversible logic circuits /  |c Ri-Gui Zhou and Naihuan Jing. 
264 1 |a New York :  |b Nova Science Publishers, Inc.,  |c [2015] 
300 |a 1 online resource 
336 |a text  |b txt  |2 rdacontent 
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490 1 |a Electrical engineering developments 
504 |a Includes bibliographical references and index. 
588 0 |a Print version record and CIP data provided by publisher. 
505 0 |a Basic knowledge of reversible quantum logic circuit -- Reversible adders -- Transistor realization of reversible 'Zs' series gates and reversible array multiplier -- Optimization approaches for designing a novel 4-bit reversible comparator -- Reversible arithmetic logic unit -- QCA theory -- QCA general logic gate design -- QCA simulation. 
520 |a In the conventional combination of logic circuits, energy loss is an important consideration. Research on reversible logic circuits are of interest to power minimization having applications in low power CMOS design, DNA computing, bioinformatics, nanotechnology, information security and so on. In this book, a novel reversible quantum full adder, reversible BCD adder, subtraction and quantum No-Wait-Carry adder and a novel reversible quantum array multiplier is introduced. At the same time, the model of this array multiplier based on CMOS technology and pass-transistor is also discussed. Revers. 
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650 0 |a Logic circuits. 
650 0 |a Reversible computing. 
650 6 |a Circuits logiques. 
650 6 |a Calcul réversible. 
650 7 |a TECHNOLOGY & ENGINEERING  |x Mechanical.  |2 bisacsh 
650 7 |a Logic circuits.  |2 fast  |0 (OCoLC)fst01002031 
650 7 |a Reversible computing.  |2 fast  |0 (OCoLC)fst01896582 
700 1 |a Jing, Naihuan,  |e author. 
776 0 8 |i Print version:  |t Reversible logic circuits.  |d New York : Nova Publishers, [2015]  |z 9781634634212  |w (DLC) 2014044400 
830 0 |a Electrical engineering developments series. 
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