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150128s2014 nyua ob 001 0 eng d |
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|a 899941937
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|a 9781606505137
|q (electronic bk.)
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|z (OCoLC)899941937
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|a UAMI
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|a Goel, Ashok K.,
|d 1953-
|e author.
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|a A one-semester course in modeling of VLSI interconnections /
|c Ashok K. Goel.
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|a A one-semester course in modeling of very large-scale integration interconnections
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|a New York, NY :
|b Momentum Press,
|c [2015]
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|c ©2015
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|a 1 online resource (1 volume) :
|b illustrations
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|a text
|b txt
|2 rdacontent
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|a computer
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|2 rdamedia
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|a online resource
|b cr
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|a Momentum Press electronic circuits and semiconductor devices collection
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|a Online resource; title from title page (Safari, viewed January 27, 2015).
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|a Includes bibliographical references and index.
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|a A One-Semester Course in Modeling of VLSI Interconnections; Dedication; Table of Contents; Preface; Acknowledgments; CHAPTER 1: Introductory Concepts; CHAPTER 2: Modeling of Interconnection Resistances, Capacitances, and Inductances; CHAPTER 3: Modeling of Interconnection Delays; CHAPTER 4: Modeling of InterconnectionCrosstalk; CHAPTER 5: Modeling of Electromigration-Induced Interconnection Failure; CHAPTER 6: Other Interconnection Technologies; APPENDIX A: Tables of Constants; APPENDIX B: Method of Images; APPENDIX C: Method of Moments; APPENDIX D: Transmission Line Equations.
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|a APPENDIX E: Miller's TheoremAPPENDIX F: Inverse Laplace Transformation Technique; Index; Ad page.
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|a Quantitative understanding of the parasitic capacitances and inductances, and the resultant propagation delays and crosstalk phenomena associated with the metallic interconnections on the very large scale integrated (VLSI) circuits has become extremely important for the optimum design of the state-of-the-art integrated circuits. More than 65 percent of the delays on the integrated circuit chip occur in the interconnections and not in the transistors on the chip. Mathematical techniques to model the parasitic capacitances, inductances, propagation delays, crosstalk noise, and electromigration-i.
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|a eBooks on EBSCOhost
|b EBSCO eBook Subscription Academic Collection - Worldwide
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|a Integrated circuits
|x Very large scale integration
|x Mathematical models.
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650 |
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|a Microelectronics
|x Mathematical models.
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|a Circuits intégrés à très grande échelle
|x Modèles mathématiques.
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|a Microélectronique
|x Modèles mathématiques.
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650 |
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|a TECHNOLOGY & ENGINEERING
|x Mechanical.
|2 bisacsh
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650 |
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|a Integrated circuits
|x Very large scale integration
|x Mathematical models
|2 fast
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650 |
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7 |
|a Microelectronics
|x Mathematical models
|2 fast
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776 |
0 |
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|i Print version:
|a Goel, Ashok.
|t A One-Semester Course in Modeling of VSLI Interconnections.
|d New York : Momentum Press, ©2014
|z 9781606505120
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830 |
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|a Electronic circuits and semiconductor devices collection.
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856 |
4 |
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|u https://ebsco.uam.elogim.com/login.aspx?direct=true&scope=site&db=nlebk&AN=934485
|z Texto completo
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938 |
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|a ProQuest Ebook Central
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|a EBSCOhost
|b EBSC
|n 934485
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|a ProQuest MyiLibrary Digital eBook Collection
|b IDEB
|n cis30543829
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|a 92
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