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|a International Symposium for Testing and Failure Analysis
|n (29th :
|d 2003 :
|c Santa Clara, Calif.)
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1 |
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|a ISTFA 2003 :
|b proceedings of the 29th International Symposium for Testing and Failure Analysis, 2-6 November 2003, Santa Clara Convention Center, Santa Clara, California /
|c sponsored by EDFAS.
|
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3 |
0 |
|a Proceedings of the 29th International Symposium for Testing and Failure Analysis, 2-6 November 2003
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| 246 |
1 |
4 |
|a Conference proceedings from the 29th International Symposium for Testing and Failure Analysis
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|a Materials Park, Ohio :
|b ASM International,
|c 2003.
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| 300 |
|
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|a 1 online resource (518 pages) :
|b illustrations
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| 336 |
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|a text
|b txt
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|a Includes bibliographical references and index.
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|a Print version record.
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|a ISTFA 2003 Organizing Committee -- EDFAS 2003 � 2004 Board Of Directors -- ISTFA 2003 Subcommittee Members -- Preface -- Table of Contents -- Session 1: Advanced Techniques -- Scanning magnetoresistive microscopy for die-level sub-micron current density mapping -- High Resolution Current Imaging by Direct Magnetic Field Sensing -- Fault Isolation of High Resistance Defects using Comparative Magnetic Field Imaging -- High Resolution Backside Thermography using a Numerical Aperture Increasing Lens -- Session 2: Optical Techniques
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|a Study of Critical Factors Determining Latchup Sensitivity of ICs using Emission MicroscopyNew Applications of Thermal Laser Signal Injection Microscopy (T-LSIM) -- PC Card Based Optical Probing of Advanced Graphics Processor using Time Resolved Emission -- Time-Resolved Optical Measurements from 0.13Âæm CMOS Technology Microprocessor using a Superconducting Single- Photon Detector -- IC Diagnostic with Time Resolved Photon Emission and CAD Auto-channeling -- Session 3: Package Level Analysis 1 -- 3D X-ray Computed Tomography (CT) for Electronic Packages
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| 505 |
8 |
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|a High- Angle Electron Microscopy Technique for Analysis of Thin Film Contamination on IC Package ExteriorsSolder bump defects in ceramic flip chip packages and their acoustic signatures. -- Copper Bond over Active Circuit (BOAC) and Copper over Anything (COA) Failure Analysis -- Investigation of Bond-pad Related Inter-metal Dielectric Crack -- Session 4: Sample Preparation 1 -- Enhanced SEM Doping Contrast -- Interconnect and Gate Level Delayering Techniques for Cu/ Low k Technology Failure Analysis
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| 505 |
8 |
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|a Backside Deprocessing of CMOS SOI Devices for Physical Defect and Failure AnalysisA Novel Approach to Front-side Deprocessing for Thinned Die after Backside Failure Isolation -- Session 5: System Level Analysis -- Dynamic Infrared System Level Fault Isolation -- X-ray Laminography Benchmarking and Failure Analysis of Solder Joint Interfaces -- XRF Correlation of Board Reseats due to Intermittent Failures from the use of Thin Gold Plating finish on the Contact Fingers -- Session 6: Metrology and Materials Analysis 1
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| 505 |
8 |
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|a Real Time SEM Imaging of FIB Milling Processes for Extended Accuracy on TEM Samples for EFTEM AnalysisA Method for Exact Determination of DRAM Deep Trench Surface Area -- A Review of TEM Observations of Failures of the Memory Cell in a Deep Trench Capacitor DRAM -- The Effect of TEM Specimen Preparation Method on Ultra-thin Gate Dielectric Analysis -- Forward Scattered Scanning Electron Microscopy for Semiconductor Metrology and Failure Analysis -- Session 7: Failure Analysis Process -- Contributions of a Formal Analysis Metaprocess to Breakthrough Failure Analysis Results
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|a eBooks on EBSCOhost
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|a Electronics
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|v Congresses.
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|a Electronic apparatus and appliances
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|i Print version:
|a International Symposium for Testing and Failure Analysis (29th : 2002 : Santa Clara, Calif.).
|t ISTFA 2003.
|d Materials Park, Ohio : ASM International, 2003
|z 0871707888
|w (OCoLC)54445605
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