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Microprocessor architecture : from simple pipelines to chip multiprocessors /

This describes microprocessor architecture, from in-order short pipeline designs to out-of-order superscalars. The emphasis is on how things work at a black box and algorithmic level, with enough detail at the register transfer level to allow appreciation of how design features enhance performance a...

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Detalles Bibliográficos
Clasificación:Libro Electrónico
Autor principal: Baer, Jean-Loup
Formato: Electrónico eBook
Idioma:Inglés
Publicado: New York : Cambridge University Press, Ã2010.
Temas:
Acceso en línea:Texto completo

MARC

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245 1 0 |a Microprocessor architecture :  |b from simple pipelines to chip multiprocessors /  |c Jean-Loup Baer. 
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505 0 |a Introduction -- The basics -- Superscalar processors -- Front-end : branch predictio, instruction fetching, and register renaming -- Back-end : instruction scheduling, memory access instructions, and clusters -- The cache hierarchy -- Multiprocessors -- Multithreading and (chip) multiprocessing -- Current limitations and future challenges. 
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520 8 |a This describes microprocessor architecture, from in-order short pipeline designs to out-of-order superscalars. The emphasis is on how things work at a black box and algorithmic level, with enough detail at the register transfer level to allow appreciation of how design features enhance performance as well as complexity. 
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