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Metamodeling-driven IP reuse for SoC integration and microprocessor design /
This cutting-edge resource offers you an in-depth understanding of metamodeling approaches for the reuse of intellectual properties (IPs) in the form of reusable design or verification components. The book covers the essential issues associated with fast and effective integration of reusable design...
| Clasificación: | Libro Electrónico |
|---|---|
| Autor principal: | |
| Otros Autores: | |
| Formato: | Electrónico eBook |
| Idioma: | Inglés |
| Publicado: |
Boston :
Artech House,
©2009.
|
| Temas: | |
| Acceso en línea: | Texto completo |
MARC
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| 100 | 1 | |a Mathaikutty, Deepak A. | |
| 245 | 1 | 0 | |a Metamodeling-driven IP reuse for SoC integration and microprocessor design / |c Deepak A. Mathaikutty, Sandeep K. Shukla. |
| 260 | |a Boston : |b Artech House, |c ©2009. | ||
| 300 | |a 1 online resource (xxi, 287 pages) : |b illustrations | ||
| 336 | |a text |b txt |2 rdacontent | ||
| 337 | |a computer |b c |2 rdamedia | ||
| 338 | |a online resource |b cr |2 rdacarrier | ||
| 504 | |a Includes bibliographical references and index. | ||
| 588 | 0 | |a Print version record. | |
| 520 | 3 | |a This cutting-edge resource offers you an in-depth understanding of metamodeling approaches for the reuse of intellectual properties (IPs) in the form of reusable design or verification components. The book covers the essential issues associated with fast and effective integration of reusable design components into a system-on-a-chip (SoC) to achieve faster design turn-around time. Moreover, it addresses key factors related to the use of reusable verification IPs for a "write once, use many times" verification strategy - another effective approach that can attain a faster product design cycle. |c Publisher abstract | |
| 590 | |a eBooks on EBSCOhost |b EBSCO eBook Subscription Academic Collection - Worldwide | ||
| 650 | 0 | |a Computer software |x Reusability. | |
| 650 | 0 | |a Computer software |x Verification. | |
| 650 | 0 | |a Systems on a chip |x Design and construction. | |
| 650 | 0 | |a Microprocessors |x Design and construction. | |
| 650 | 0 | |a Intellectual property. | |
| 650 | 0 | |a System design. | |
| 650 | 2 | |a Intellectual Property | |
| 650 | 6 | |a Logiciels |x Réutilisation. | |
| 650 | 6 | |a Logiciels |x Vérification. | |
| 650 | 6 | |a Propriété intellectuelle. | |
| 650 | 6 | |a Conception de systèmes. | |
| 650 | 7 | |a intellectual property. |2 aat | |
| 650 | 7 | |a TECHNOLOGY & ENGINEERING |x Electronics |x Circuits |x VLSI & ULSI. |2 bisacsh | |
| 650 | 7 | |a TECHNOLOGY & ENGINEERING |x Electronics |x Circuits |x Logic. |2 bisacsh | |
| 650 | 7 | |a COMPUTERS |x Logic Design. |2 bisacsh | |
| 650 | 7 | |a Computer software |x Reusability. |2 fast |0 (OCoLC)fst00872588 | |
| 650 | 7 | |a Computer software |x Verification. |2 fast |0 (OCoLC)fst00872604 | |
| 650 | 7 | |a Intellectual property. |2 fast |0 (OCoLC)fst00975774 | |
| 650 | 7 | |a Microprocessors |x Design and construction. |2 fast |0 (OCoLC)fst01020013 | |
| 650 | 7 | |a System design. |2 fast |0 (OCoLC)fst01141401 | |
| 650 | 7 | |a Systems on a chip |x Design and construction. |2 fast |0 (OCoLC)fst01141474 | |
| 700 | 1 | |a Shukla, Sandeep K. | |
| 776 | 0 | 8 | |i Print version: |a Mathaikutty, Deepak A. |t Metamodeling-driven IP reuse for SoC integration and microprocessor design. |d Boston : Artech House, ©2009 |z 9781596934245 |w (OCoLC)303058714 |
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