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System-level design with Rosetta /
The steady and unabated increase in the capacity of silicon has brought the semiconductor industry to a watershed challenge. Now a single chip can integrate a radio transceiver, a network interface, multimedia functions, all the "glue" needed to hold it together as well as a design that al...
| Clasificación: | Libro Electrónico |
|---|---|
| Autor principal: | |
| Formato: | Electrónico eBook |
| Idioma: | Inglés |
| Publicado: |
Amsterdam ; Boston : San Francisco :
Elsevier ; Morgan Kaufman,
©2007.
|
| Colección: | Morgan Kaufmann series in systems on silicon.
|
| Temas: | |
| Acceso en línea: | Texto completo Texto completo |
MARC
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| 245 | 1 | 0 | |a System-level design with Rosetta / |c Perry Alexander. |
| 260 | |a Amsterdam ; |a Boston : |b Elsevier ; |a San Francisco : |b Morgan Kaufman, |c ©2007. | ||
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| 490 | 1 | |a The Morgan Kaufmann series in systems on silicon | |
| 520 | |a The steady and unabated increase in the capacity of silicon has brought the semiconductor industry to a watershed challenge. Now a single chip can integrate a radio transceiver, a network interface, multimedia functions, all the "glue" needed to hold it together as well as a design that allows the hardware and software to be reconfigured for future applications. Such complex heterogeneous systems demand a different design methodology. A consortium of industrial and government labs have created a new language and a new design methodology to support this effort. Rosetta permits designers to specify requirements and constraints independent of their low level implementation and to integrate the designs of domains as distinct as digital and analog electronics, and the mechanical, optical, fluidic and thermal subsystems with which they interact. In this book, Perry Alexander, one of the developers of Rosetta, provides a tutorial introduction to the language and the system-level design methodology it was designed to support. * The first commercially published book on this system-level design language * Teaches you all you need to know on how to specify, define, and generate models in Rosetta * A presentation of complete case studies analyzing design trade-offs for power consumption, security requirements in a networking environment, and constraints for hardware/software co-design | ||
| 505 | 0 | |a Chapter 1: Introduction -- Chapter 2: Items, Values, Types and Declarations -- Chapter 3: Expressions -- Chapter 4: Elemental Types -- Chapter 5: Composite Types -- Chapter 6: Functions -- Chapter 7: Higher-Order Functions -- Chapter 8: User Defined Types -- Chapter 9: Facet Basics -- Chapter 10: Defining Facets -- Chapter 11: Packages, Libraries and Components -- Chapter 12: Domains -- Chapter 13: Reflection -- Chapter 14: The Facet Algebra -- Chapter 15: Domain Interactions -- Chapter 16: Case Studies -- Chapter 17: RTL Design -- Chapter 18: Power Aware Design -- Chapter 19: Power Aware Modeling Revisited -- Chapter 20: System-Level Networking. | |
| 504 | |a Includes bibliographical references (pages 339-341) and index. | ||
| 588 | 0 | |a Print version record. | |
| 546 | |a English. | ||
| 590 | |a O'Reilly |b O'Reilly Online Learning: Academic/Public Library Edition | ||
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| 650 | 0 | |a Integrated circuits |x Computer-aided design. | |
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