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m o d |
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008 |
190126s2019 nyua ob 001 0 eng d |
040 |
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|a EBLCP
|b eng
|e pn
|c EBLCP
|d MERUC
|d YDX
|d CHVBK
|d OCLCO
|d OCLCF
|d OCLCQ
|d LOA
|d K6U
|d PIF
|d OCLCO
|d OCL
|d OCLCQ
|d OCLCO
|d OCLCQ
|d OCLCO
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019 |
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|a 1083032026
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|a 9781949449167
|q (electronic bk.)
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020 |
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|a 1949449165
|q (electrnic bk.)
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020 |
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|z 9781949449150
|q (paperback)
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020 |
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|z 1949449157
|q (paperback)
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029 |
1 |
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|a AU@
|b 000067288903
|
029 |
1 |
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|a CHNEW
|b 001040094
|
029 |
1 |
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|a CHVBK
|b 559037589
|
035 |
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|a (OCoLC)1083466844
|z (OCoLC)1083032026
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050 |
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4 |
|a QA76.9.S88
|b .M377 2019
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082 |
0 |
4 |
|a 004.21
|2 23
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|a UAMI
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|a Massengale, Larry,
|e author.
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|a Digital systems design.
|n Volume III,
|p Latch-flip-flop circuits and characteristics of digital circuits /
|c Larry Massengale.
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|a New York :
|b Momentum Press,
|c 2019.
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300 |
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|a 1 online resource (197 pages)
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|a text
|b txt
|2 rdacontent
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337 |
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|a computer
|b c
|2 rdamedia
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338 |
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|a online resource
|b cr
|2 rdacarrier
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490 |
1 |
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|a Engineering technology collection
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|a Includes bibliographical references (page 169) and index.
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|a Print version record.
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|a 1. Latch and flip flop circuits -- 1.1. Introduction -- 1.2. Active low latch -- NAND gate latch -- 1.3. Active high latch -- NOR gate latch -- 1.4. Active low gated set-clear (S-C) latch -- 1.5. Active low gated D latch -- 1.6. Four-bit bistable latches -- 1.6.1. SN74LS75 -- 1.6.2. SN74LS77 -- 1.7. D-type flip flop: positive edge triggered D-type flip flop -- 1.7.1. Negative edge triggered D-type flip flop -- 1.8. JK-type flip flop: positive edge triggered JK flip flop -- 1.9. Master-slave JK-type flip flop -- 1.10. Chapter 1 review questions -- 1.11. Chapter 1 review answers -- 2. Characteristics of digital circuits -- 2.1. Introduction -- 2.2. RC time constant -- 2.2.1. Charging -- 2.2.2. Discharging -- 2.3. Electrical behavior of circuits -- 2.3.1 Data sheets and specifications -- 2.3.2. Logic levels and noise margins -- 2.3.2.1. Logic level -- 2.3.2.2. Noise margin -- 2.3.3. Circuit behavior with circuit loads -- 2.3.4. Fan-outs -- 2.3.5. Effects of loading -- 2.3.6. Unused inputs -- 2.3.7. Current spikes and decoupling capacitors -- 2.3.8. Destruction of CMOS devices -- 2.4. Dynamic electrical behavior -- 2.4.1. Gate delays and timing diagrams -- 2.4.2. Transition time -- 2.4.3. Propagation delay -- 2.4.4. Power consumption -- 2.5. Timing considerations -- 2.5.1. Setup and hold times -- 2.5.2. Maximum clocking frequency fMAX -- 2.5.3. Clock pulse high and low times -- 2.5.4. Asynchronous active pulse width -- 2.5.5. Clock transition times -- 2.6. Data storage and transfer -- 2.6.1. Flip flops form registers -- 2.6.2. Serial input serial output (SISO) -- 2.6.3. Serial input parallel output (SIPO) -- 2.6.4. Parallel input serial output (PISO) -- 2.6.4.1. Shift mode -- 2.6.5. Parallel input parallel output (PIPO) -- 2.6.5.1. Bidirectional shift register -- 2.6.5.2. Universal shift register -- 2.7. Chapter 2 review -- questions -- 2.8. Chapter 2 review -- answers
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|a Working as an engineer with advanced weapon systems for more than 25 years, it was crucial to understand the fundamentals of digital systems design development methods and combinational logic circuits. Whether as a technician or as an engineer, these fundamentals are the basics of engineering and are essential in interpreting logic gate functionality. The intent of this book is to provide much more information than most commercial engineering references currently offer. Chapter 1, Latch and Flip Flop Circuits, discusses fundamental operations of NAND gate latch, NOR gate latch, gated S-C latch, gated D latch, four-bit bistable latch, D-type flip flop, JK-type flip flop, and master slave JK-type flip flop circuits. Chapter 2, Characteristics of Digital Circuits, provides a brief introduction to circuit characteristics. This chapter discusses RC time constants, electrical and dynamic behavior of circuits, timing considerations, and data storage and transfer devices. The chapter review and answer sections contain an extensive number of questions that afford comprehensive insights into obtaining the answers. This book will be an extremely valuable asset for technical and engineering students studying digital system design.
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590 |
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|a ProQuest Ebook Central
|b Ebook Central Academic Complete
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650 |
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|a System design.
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650 |
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|a Logic circuits.
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650 |
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|a Digital electronics.
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650 |
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6 |
|a Conception de systèmes.
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650 |
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6 |
|a Circuits logiques.
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650 |
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6 |
|a Électronique numérique.
|
650 |
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7 |
|a Logic circuits
|2 fast
|
650 |
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7 |
|a Digital electronics
|2 fast
|
650 |
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7 |
|a System design
|2 fast
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776 |
0 |
8 |
|i Print version:
|a Massengale, Larry.
|t Digital Systems Design, book 3 : Latch-Flip-Flop Circuits and Characteristics of Digital Circuits.
|d New York : Momentum Press, ©2019
|z 9781949449150
|
830 |
|
0 |
|a Engineering technology collection.
|
856 |
4 |
0 |
|u https://ebookcentral.uam.elogim.com/lib/uam-ebooks/detail.action?docID=5639119
|z Texto completo
|
938 |
|
|
|a ProQuest Ebook Central
|b EBLB
|n EBL5639119
|
938 |
|
|
|a YBP Library Services
|b YANK
|n 15985875
|
994 |
|
|
|a 92
|b IZTAP
|