ASIC/SoC functional design verification : a comprehensive guide to technologies and methodologies /

This book describes in detail all required technologies and methodologies needed to create a comprehensive, functional design verification strategy and environment to tackle the toughest job of guaranteeing first-pass working silicon The author outlines all of the verification sub-fields at a high l...

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Detalles Bibliográficos
Clasificación:Libro Electrónico
Autor principal: Mehta, Ashok B. (Autor)
Formato: Electrónico eBook
Idioma:Inglés
Publicado: Cham : Springer, [2018]
Temas:
Integrated circuits > Verification.
Application-specific integrated circuits > Design.
Systems on a chip > Design.
SystemVerilog (Computer hardware description language)
Systems engineering.
Circuits intégrés > Vérification.
SystemVerilog (Langage de description de matériel informatique)
Ingénierie des systèmes.
Informatique.
systems engineering.
data processing.
computer science.
Computer architecture & logic design.
Circuits & components.
TECHNOLOGY & ENGINEERING > Mechanical.
Integrated circuits > Verification
Application-specific integrated circuits > Design
Electronic circuits
Engineering
Logic design
Microprocessors
Acceso en línea:Texto completo
Tabla de Contenidos:
  • Chapter 1. Introduction
  • Chapter 2. Functional Verification- Challeenges and Solution
  • Chapter 3. SystemVerilog Paradigm
  • Chapter 4. UVM
  • Chapter 5. CRV
  • Chapter 6. SVA
  • Chapter 7. SFC
  • Chapter 8. CDC
  • Chapter 9. Low Power Verification
  • Chapter 10. Static Verification
  • Chapter 11. ESL
  • Chapter 12. Hardware/Software Co-verification
  • Chapter 13
  • Analog Mixed Signals Verification
  • Chapter 14
  • SOC Interconnect Verification
  • Chapter 15. The Complete Product Design Lifecycle
  • Chapter 16. Voice Over IP
  • Chapter 17. Cache Memory Subsystem Verification: UVM Agent Based
  • Chapter 18. Cache Memory Subsystem Verification: ISS Based.

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