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SiP-System in Package Design and Simulation : Mentor EE Flow Advanced Design Guide.
An advanced reference documenting, in detail, every step of a real System-in-Package (SiP) design flow, this extensively illustrated book is an indispensable working resource for every SiP designer, especially those who use Mentor design tools. --
| Clasificación: | Libro Electrónico |
|---|---|
| Autor principal: | |
| Formato: | Electrónico eBook |
| Idioma: | Inglés |
| Publicado: |
Newark :
John Wiley & Sons, Incorporated,
2017.
|
| Temas: | |
| Acceso en línea: | Texto completo |
MARC
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| 100 | 1 | |a Li, Suny, |d 1974- |1 https://id.oclc.org/worldcat/entity/E39PCjwV4RkgkWmqXhWFkfgVG3 | |
| 245 | 1 | 0 | |a SiP-System in Package Design and Simulation : |b Mentor EE Flow Advanced Design Guide. |
| 260 | |a Newark : |b John Wiley & Sons, Incorporated, |c 2017. | ||
| 300 | |a 1 online resource (506 pages) | ||
| 336 | |a text |b txt |2 rdacontent | ||
| 337 | |a computer |b c |2 rdamedia | ||
| 338 | |a online resource |b cr |2 rdacarrier | ||
| 347 | |a data file |2 rda | ||
| 588 | 0 | |a Print version record. | |
| 505 | 0 | |a Cover; Title Page; Copyright; Contents; About the Author; Preface; Chapter 1 SiP Design and Simulation Platform; 1.1 From package to SiP; 1.2 The development of mentor SiP design technology; 1.3 The mentor SiP design and simulation platform; 1.3.1 SiP platform introduction; 1.3.2 Schematic input; 1.3.3 Concurrent system design; 1.3.4 SiP board design; 1.3.5 Signal integrity and power integrity simulation; 1.3.6 Thermal analysis; 1.3.7 The advantages of the mentor SiP design and simulation platform; 1.3.7.1 Characteristics of mentor SiP design and simulation platform. | |
| 505 | 8 | |a 1.3.7.2 Design areas of mentor SiP design and simulation platform1.4 The introduction of the finished project; Chapter 2 Introduction to Package; 2.1 Definition and function of package; 2.2 Development of packaging technology; 2.3 SiP and Related Technologies; 2.3.1 The appearance of SiP technology; 2.3.2 SoC and SiP; 2.3.3 SiP-related technologies; 2.4 The development of the package market; 2.5 Package manufacturers; 2.5.1 Traditional package manufacturers; 2.5.2 New SiP manufacturers in different areas; 2.6 Bare chip suppliers; Chapter 3 The SiP Production Process. | |
| 505 | 8 | |a 3.1 BGA: The mainstream SiP package form3.2 The SiP package production process; 3.3 Three key elements of SiP; Chapter 4 New Package Technologies; 4.1 TSV (Through Silicon Via) technology; 4.1.1 TSV introduction; 4.1.2 TSV technical characteristics; 4.1.3 TSV application and prospects; 4.2 Integrated passive device (IPD) technology; 4.2.1 IPD introduction; 4.2.2 The advantages of IPD; 4.3 Package on package (PoP) technology; 4.3.1 The limitations of 3D SiP; 4.3.2 The application of PoP; 4.3.3 The emphasis in PoP design; 4.4 Apple A8 processor -- an example of a PoP product. | |
| 505 | 8 | |a Chapter 5 SiP Design and Simulation Flow5.1 SiP design and simulation flow; 5.2 Design and simulation process in Mentor EE Flow; 5.2.1 Library creation; 5.2.2 Schematic design; 5.2.3 Layout design; 5.2.4 Design simulation; Chapter 6 Central Library; 6.1 The structure of the central library; 6.2 Introduction to the Dashboard; 6.3 Schematic symbol creation; 6.4 Bare chip cell creation; 6.4.1 Create bare chip padstack; 6.4.2 Create bare chip cell; 6.5 BGA cell creation; 6.5.1 Create BGA padstack; 6.5.2 Create BGA cell manually; 6.5.2.1 Tips for renaming the pin numbers. | |
| 505 | 8 | |a 6.5.2.2 View layers defined in padstacks6.5.3 Create BGA cell with Die Wizard; 6.5.4 LP Wizard professional library tool; 6.6 Part creation; 6.7 Create cell via part; Chapter 7 Schematic Input; 7.1 Netlist input; 7.2 Basic schematic input; 7.2.1 Start DxDesigner; 7.2.1.1 General toolbar; 7.2.1.2 Digital/analog simulation toolbar; 7.2.1.3 RF circuit design toolbar; 7.2.2 Create new project; 7.2.2.1 How to create a new project; 7.2.2.2 Net connection and draw toolbar; 7.2.3 Schematic design check; 7.2.4 Design rules setup; 7.2.5 Package design; 7.2.5.1 Packaging options. | |
| 500 | |a 7.2.5.2 PDB Extraction Options. | ||
| 520 | |a An advanced reference documenting, in detail, every step of a real System-in-Package (SiP) design flow, this extensively illustrated book is an indispensable working resource for every SiP designer, especially those who use Mentor design tools. -- |c Edited summary from book. | ||
| 504 | |a Includes bibliographical references and index. | ||
| 590 | |a ProQuest Ebook Central |b Ebook Central Academic Complete | ||
| 650 | 0 | |a Integrated circuits |x Design and construction. | |
| 650 | 0 | |a Multichip modules (Microelectronics) |x Design and construction. | |
| 650 | 6 | |a Circuits intégrés |x Conception et construction. | |
| 650 | 7 | |a TECHNOLOGY & ENGINEERING |x Mechanical. |2 bisacsh | |
| 650 | 7 | |a Integrated circuits |x Design and construction |2 fast | |
| 650 | 7 | |a Multichip modules (Microelectronics) |x Design and construction |2 fast | |
| 758 | |i has work: |a SiP-system in package design and simulation (Text) |1 https://id.oclc.org/worldcat/entity/E39PCFyWB7QBB94pWW86fYmgjy |4 https://id.oclc.org/worldcat/ontology/hasWork | ||
| 776 | 0 | 8 | |i Print version: |a (Li Yang), Suny Li. |t SiP-System in Package Design and Simulation : Mentor EE Flow Advanced Design Guide. |d Newark : John Wiley & Sons, Incorporated, ©2017 |z 9781119045939 |
| 856 | 4 | 0 | |u https://ebookcentral.uam.elogim.com/lib/uam-ebooks/detail.action?docID=4915580 |z Texto completo |
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