Non-Volatile In-Memory Computing by Spintronics.

Bibliographic Details
Call Number:Libro Electrónico
Main Author: Yu, Hao
Other Authors: Ni, Leibin, Wang, Yuhao, Iniewski, Kris
Format: Electronic eBook
Language:Inglés
Published: San Rafael : Morgan & Claypool Publishers, 2016.
Series:Synthesis lectures on emerging engineering technologies.
Subjects:
Spintronics.
Nonvolatile random-access memory.
Électronique de spin.
Ordinateurs > Mémoires vives non volatiles.
Nonvolatile random-access memory
Spintronics
Online Access:Texto completo
Table of Contents:
  • Preface; Acknowledgments; Introduction; Memory Wall; Traditional Semiconductor Memory; Overview; Nano-scale Limitations; Non-volatile Spintronic Memory; Basic Magnetization Process; Magnetization Damping; Spin-transfer Torque; Magnetization Dynamics; Domain Wall Propagation; Traditional Memory Architecture; Non-volatile In-memory Computing Architecture; References; Non-volatile Spintronic Device and Circuit; SPICE Formulation with New Nano-scale NVM Devices; Traditional Modified Nodal Analysis; New MNA with Non-volatile State Variables; STT-MTJ Device and Model; STT-MTJ; STT-RAM.
  • Topological InsulatorDomain Wall Device and Model; Magnetization Reversal; MTJ Resistance; Domain Wall Propagation; Circular Domain Wall Nanowire; Spintronic Storage; Spintronic Memory; Spintronic Readout; Spintronic Logic; XOR; Adder; Multiplier; LUT; Spintronic Interconnect; Coding-based Interconnect; Domain Wall-based Encoder/Decoder; Performance Evaluation; References; In-memory Data Encryption; In-memory Advanced Encryption Standard; Fundamental of AES; Domain Wall Nanowire-based AES Computing; Pipelined AES by Domain Wall Nanowire; Performance Evaluation.
  • Domain Wall-based SIMON Block CipherFundamental of SIMON Block Cipher; Hardware Stages; Round Counter; Control Signals; Key Expansion; Encryption; Performance Evaluation; References; In-memory Data Analytics; In-memory Machine Learning; Extreme Learning Machine; MapReduce-based Matrix Multiplication; Domain Wall-based Hardware Mapping; Performance Evaluation; In-memory Face Recognition; Energy-efficient STT-MRAM with Spare-represented Data; QoS-aware Adaptive Current Scaling; STT-RAM based Hardware Mapping; Performance Evaluation; References; Authors' Biographies.

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