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Digital electronics. sequential and arithmetic logic circuits / Volume 2 :

The book presents the principles of combinational and sequential logic and the underlying techniques for the analysis and design of digital circuits. The approach is gradual and relatively independent of each other chapters. To facilitate the assimilation and practical implementation of various conc...

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Detalles Bibliográficos
Clasificación:Libro Electrónico
Autor principal: Ndjountche, Tertulien (Autor)
Formato: Electrónico eBook
Idioma:Inglés
Publicado: Hoboken : Wiley, 2016.
Colección:Electronics engineering series (London, England)
Temas:
Acceso en línea:Texto completo

MARC

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072 7 |a TEC  |x 008060  |2 bisacsh 
082 0 4 |a 621.381  |2 23 
049 |a UAMI 
100 1 |a Ndjountche, Tertulien,  |e author. 
245 1 0 |a Digital electronics.  |n Volume 2 :  |b sequential and arithmetic logic circuits /  |c Tertulien Ndjountche. 
264 1 |a Hoboken :  |b Wiley,  |c 2016. 
300 |a 1 online resource. 
336 |a text  |b txt  |2 rdacontent 
337 |a computer  |b c  |2 rdamedia 
338 |a online resource  |b cr  |2 rdacarrier 
490 1 |a Electronics engineering series 
504 |a Includes bibliographical references and index. 
588 0 |a Online resource, title from PDF title page (EBSCO, viewed October 3, 2016) 
520 |a The book presents the principles of combinational and sequential logic and the underlying techniques for the analysis and design of digital circuits. The approach is gradual and relatively independent of each other chapters. To facilitate the assimilation and practical implementation of various concepts, the book is complemented by a selection of practical exercises corrected. It deals with the analysis and design digital circuits, logic gates to machinery (PLCs) with a finite number of states, and contains 14 chapters divided into 4 volumes. 
505 0 |a Cover -- Title Page -- Copyright -- Contents -- Preface -- P.1. Summary -- P.2. The reader -- 1. Latch and Flip-Flop -- 1.1. Introduction -- 1.2. General overview -- 1.2.1. SR latch -- 1.2.2. \bar{S} \bar{R} latch -- 1.2.3. Application: switch debouncing -- 1.3. Gated SR latch -- 1.3.1. Implementation based on an SR latch -- 1.3.2. Implementation based on an \bar{S} \bar{R} latch -- 1.4. Gated D latch -- 1.5. Basic JK flip-flop -- 1.6. T flip-flop -- 1.7. Master-slave and edge-triggered flip-flop -- 1.7.1. Master-slave flip-flop -- 1.7.2. Edge-triggered flip-flop 
505 8 |a 1.8. Flip-flops with asynchronous inputs -- 1.9. Operational characteristics of flip-flops -- 1.10. Exercises -- 1.11. Solutions -- 2. Binary Counters -- 2.1. Introduction -- 2.2. Modulo 4 counter -- 2.3. Modulo 8 counter -- 2.4. Modulo 16 counter -- 2.4.1. Modulo 10 counter -- 2.5. Counter with parallel load -- 2.6. Down counter -- 2.7. Synchronous reversible counter -- 2.8. Decoding a down counter -- 2.9. Exercises -- 2.10. Solutions -- 3. Shift Register -- 3.1. Introduction -- 3.2. Serial-in shift register -- 3.3. Parallel-in shift register -- 3.4. Bidirectional shift register 
505 8 |a 3.5. Register file -- 3.6. Shift register based counter -- 3.6.1. Ring counter -- 3.6.2. Johnson counter -- 3.6.3. Linear feedback counter -- 3.7. Exercises -- 3.8. Solutions -- 4. Arithmetic and Logic Circuits -- 4.1. Introduction -- 4.2. Adder -- 4.2.1. Half adder -- 4.2.2. Full adder -- 4.2.3. Ripple-carry adder -- 4.2.4. Carry-lookahead adder -- 4.2.5. Carry-select adder -- 4.2.6. Carry-skip adder -- 4.3. Comparator -- 4.4. Arithmetic and logic unit -- 4.5. Multiplier -- 4.5.1. Multiplier of 2-bit unsigned numbers -- 4.5.2. Multiplier of 4-bit unsigned numbers 
505 8 |a 4.5.3. Multiplier for signed numbers -- 4.6. Divider -- 4.7. Exercises -- 4.8. Solutions -- 5. Digital Integrated Circuit Technology -- 5.1. Introduction -- 5.2. Characteristics of the technologies -- 5.2.1. Supply voltage -- 5.2.2. Logic levels -- 5.2.3. Immunity to noise -- 5.2.4. Propagation delay -- 5.2.5. Electric power consumption -- 5.2.6. Fan-out or load factor -- 5.3. TTL logic family -- 5.3.1. Bipolar junction transistor -- 5.3.2. TTL NAND gate -- 5.3.3. Integrated TTL circuit -- 5.4. CMOS logic family -- 5.4.1. MOSFET transistor -- 5.4.2. CMOS logic gates -- 5.5. Open drain logic gates 
505 8 |a 5.5.1. Three-state buffer -- 5.5.2. CMOS integrated circuit -- 5.6. Other logic families -- 5.7. Interfacing circuits of different technologies -- 5.8. Exercises -- 5.9. Solutions -- 6. Semiconductor Memory -- 6.1. Introduction -- 6.2. Memory organization -- 6.3. Operation of a memory -- 6.4. Types of memory -- 6.4.1. Non-volatile memory -- 6.4.2. Volatile memories -- 6.4.3. Characteristics of the different memory types -- 6.5. Applications -- 6.5.1. Memory organization -- 6.5.2. Applications -- 6.6. Other types of memory -- 6.6.1. Ferromagnetic RAM -- 6.6.2. Content-addressable memory 
590 |a ProQuest Ebook Central  |b Ebook Central Academic Complete 
650 0 |a Digital electronics. 
650 0 |a Sequential circuits. 
650 0 |a Logic circuits. 
650 6 |a Électronique numérique. 
650 6 |a Circuits séquentiels. 
650 6 |a Circuits logiques. 
650 7 |a TECHNOLOGY & ENGINEERING / Electronics / Digital  |2 bisacsh 
650 7 |a Digital electronics  |2 fast 
650 7 |a Logic circuits  |2 fast 
650 7 |a Sequential circuits  |2 fast 
758 |i has work:  |a Volume 2 Digital electronics (Text)  |1 https://id.oclc.org/worldcat/entity/E39PCGfbhQgTJrBv9k8fvGWbV3  |4 https://id.oclc.org/worldcat/ontology/hasWork 
830 0 |a Electronics engineering series (London, England) 
856 4 0 |u https://ebookcentral.uam.elogim.com/lib/uam-ebooks/detail.action?docID=4648716  |z Texto completo 
938 |a Askews and Holts Library Services  |b ASKH  |n AH30990557 
938 |a Askews and Holts Library Services  |b ASKH  |n AH30990556 
938 |a ProQuest MyiLibrary Digital eBook Collection  |b IDEB  |n cis35006631 
938 |a EBSCOhost  |b EBSC  |n 1339805 
938 |a Recorded Books, LLC  |b RECE  |n rbeEB00684561 
994 |a 92  |b IZTAP