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|a Handbook of 3D integration.
|n Volume 3,
|p 3D process technology /
|c edited by Philip Garrou, Mitsumasa Koyanagi, and Peter Ramm.
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| 250 |
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|a First edition.
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| 264 |
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|a Weinheim :
|b Wiley-VCH,
|c [2014]
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|c ©2014
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| 300 |
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|a 1 online resource (xxii, 451 pages) :
|b illustrations
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| 336 |
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|a text
|b txt
|2 rdacontent
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|a computer
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|2 rdamedia
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| 338 |
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|a online resource
|b cr
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| 500 |
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|a Edition statement from running title area.
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|a Includes bibliographical references and index.
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|a Online resource; title from PDF title page (Wiley, viewed August 5, 2014).
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|a Handbook of 3D Integration: 3D Process Technology; Contents; List of Contributors; 1 3D IC Integration Since 2008; 1.1 3D IC Nomenclature; 1.2 Process Standardization; 1.3 The Introduction of Interposers (2.5D); 1.4 The Foundries; 1.4.1 TSMC; 1.4.2 UMC; 1.4.3 GlobalFoundries; 1.5 Memory; 1.5.1 Samsung; 1.5.2 Micron; 1.5.3 Hynix; 1.6 The Assembly and Test Houses; 1.7 3D IC Application Roadmaps; References; 2 Key Applications and Market Trends for 3D Integration and Interposer Technologies; 2.1 Introduction; 2.2 Advanced Packaging Importance in the Semiconductor Industry is Growing.
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|a 2.3 3D Integration-Focused Activities -- The Global IP Landscape2.4 Applications, Technology, and Market Trends; References; 3 Economic Drivers and Impediments for 2.5D/3D Integration; 3.1 3D Performance Advantages; 3.2 The Economics of Scaling; 3.3 The Cost of Future Scaling; 3.4 Cost Remains the Impediment to 2.5D and 3D Product Introduction; 3.4.1 Required Economics for Interposer Use in Mobile Products; 3.4.2 Silicon Interposer Pricing; References; 4 Interposer Technology; 4.1 Definition of 2.5D Interposers; 4.2 Interposer Drivers and Need; 4.3 Comparison of Interposer Materials.
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|a 4.4 Silicon Interposers with TSV4.5 Lower Cost Interposers; 4.5.1 Glass Interposers; 4.5.1.1 Challenges in Glass Interposers; 4.5.1.2 Small-Pitch Through-Package Via Hole Formation and Ultrathin Glass Handling; 4.5.1.3 Metallization of Glass TPV; 4.5.1.4 Reliability of Copper TPVs in Glass Interposers; 4.5.1.5 Thermal Dissipation of Glass; 4.5.1.6 Glass Interposer Fabrication with TPV and RDL; 4.5.2 Low-CTE Organic Interposers; 4.5.3 Polycrystalline Silicon Interposer; 4.5.3.1 Polycrystalline Silicon Interposer Fabrication Process; 4.6 Interposer Technical and Manufacturing Challenges.
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| 505 |
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|a 4.7 Interposer Application Examples4.8 Conclusions; References; 5 TSV Formation Overview; 5.1 Introduction; 5.2 TSV Process Approaches; 5.2.1 TSV-Middle Approach; 5.2.2 Backside TSV-Last Approach; 5.2.3 Front-Side TSV-Last Approach; 5.3 TSV Fabrication Steps; 5.3.1 TSV Etching; 5.3.2 TSV Insulation; 5.3.3 TSV Metallization; 5.3.4 Overburden Removal by CMP; 5.3.5 TSV Anneal; 5.3.6 Temporary Carrier Wafer Bonding and Debonding; 5.3.7 Wafer Thinning and TSV Reveal; 5.4 Yield and Reliability; References; 6 TSV Unit Processes and Integration; 6.1 Introduction; 6.2 TSV Process Overview.
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|a 6.3 TSV Unit Processes6.3.1 Etching; 6.3.2 Insulator Deposition with CVD; 6.3.3 Metal Liner/Barrier Deposition with PVD; 6.3.4 Via Filling by ECD of Copper; 6.3.5 CMP of Copper; 6.3.6 Temporary Bonding between Carrier and Device Wafer; 6.3.7 Wafer Backside Thinning; 6.3.8 Backside RDL; 6.3.9 Metrology, Inspection, and Defect Review; 6.4 Integration and Co-optimization of Unit Processes in Via Formation Sequence; 6.5 Co-optimization of Unit Processes in Backside Processing and Via-Reveal Flow; 6.6 Integration and Co-optimization of Unit Processes in Via-Last Flow.
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|a ProQuest Ebook Central
|b Ebook Central Academic Complete
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| 650 |
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|a Integrated circuits.
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| 650 |
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|a Integrated circuits
|x Design and construction.
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|a Semiconductor wafers.
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|a Three-dimensional imaging.
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|a Imaging, Three-Dimensional
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|a Circuits intégrés.
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|a Circuits intégrés
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|a Plaquettes à gravure en semi-conducteurs.
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|a Imagerie tridimensionnelle.
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|a Integrated circuits
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| 650 |
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7 |
|a Integrated circuits
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| 650 |
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|a Semiconductor wafers
|2 fast
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| 650 |
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|a Three-dimensional imaging
|2 fast
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| 700 |
1 |
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|a Garrou, Philip E.,
|e editor.
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| 700 |
1 |
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|a Koyanagi, Mitsumasa,
|e editor.
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| 700 |
1 |
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|a Ramm, Peter,
|e editor.
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| 758 |
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|i has work:
|a Handbook of 3D integration 3D process technology Volume 3 (Text)
|1 https://id.oclc.org/worldcat/entity/E39PCGXFVbdt3gJXfHQCmqG8Yd
|4 https://id.oclc.org/worldcat/ontology/hasWork
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|i Print version :
|t Handbook of 3D integration. Volume 3, 3D process technology.
|d Weinheim, Germany : Wiley-VCH, [2014]
|z 9783527334667
|w (OCoLC)883422190
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