Tabla de Contenidos:
  • Part 1. Technology Metrics
  • Energy and Delay Models / Dejan Marković and Robert W. Brodersen
  • Circuit Optimization / Dejan Marković, Robert W. Brodersen and Borivoje Nikolić
  • Architectural Techniques / Dejan Marković, Robert W. Brodersen and Borivoje Nikolić
  • Architecture Flexibility / Dejan Marković and Robert W. Brodersen
  • Part 2. DSP Operations and Their Architecture
  • Arithmetic for DSP / Dejan Marković and Robert W. Brodersen
  • CORDIC, Divider, Square Root / Dejan Marković and Robert W. Brodersen
  • Digital Filters / Dejan Marković, Robert W. Brodersen, Rashmi Nanda and Borivoje Nikolić
  • Time-Frequency Analysis: FFT and Wavelets / Dejan Marković, Robert W. Brodersen, Rashmi Nanda and Vaibhav Karkare
  • Part 3. Architecture Modeling and Optimized Implementation
  • Data-Flow Graph Model / Dejan Marković, Robert W. Brodersen and Rashmi Nanda
  • Wordlength Optimization / Dejan Marković, Robert W. Brodersen, Cheng C. Wang and Changchun Shi
  • Architectural Optimization / Dejan Marković, Robert W. Brodersen and Rashmi Nanda
  • Simulink-Hardware Flow / Dejan Marković, Robert W. Brodersen, Rashmi Nanda and Henry Chen
  • Part 4. Design Examples: GHz to kHz
  • Multi-GHz Radio DSP / Dejan Marković, Robert W. Brodersen and Rashmi Nanda
  • MHz-rate Multi-Antenna Decoders: Dedicated SVD Chip Example / Dejan Marković, Robert W. Brodersen, Borivoje Nikolić and Chia-Hsiang Yang
  • MHz-rate Multi-Antenna Decoders: Flexible Sphere Decoder Chip Examples / Dejan Marković, Robert W. Brodersen and Chia-Hsiang Yang
  • kHz-Rate Neural Processors / Dejan Marković, Robert W. Brodersen, Sarah Gibson and Vaibhav Karkare.