Cargando…

Embedded SOPC design with NIOS II processor and VHDL examples /

"The book is divided into four major parts. Part I covers HDL constructs and synthesis of basic digital circuits. Part II provides an overview of embedded software development with the emphasis on low-level I/O access and drivers. Part III demonstrates the design and development of hardware and...

Descripción completa

Detalles Bibliográficos
Clasificación:Libro Electrónico
Autor principal: Chu, Pong P., 1959-
Formato: Electrónico eBook
Idioma:Inglés
Publicado: Hoboken, N.J. : Wiley, ©2011.
Temas:
Acceso en línea:Texto completo

MARC

LEADER 00000cam a2200000 a 4500
001 EBOOKCENTRAL_ocn757486963
003 OCoLC
005 20240329122006.0
006 m o d
007 cr cnu---unuuu
008 111018s2011 njua ob 001 0 eng d
010 |z  2011022710 
040 |a DG1  |b eng  |e pn  |c DG1  |d YDXCP  |d CDX  |d COO  |d N$T  |d E7B  |d OCLCO  |d OCLCQ  |d DEBSZ  |d EBLCP  |d OCLCQ  |d OCLCA  |d OCLCQ  |d OCLCF  |d IDEBK  |d DEBBG  |d OCLCQ  |d AZK  |d COCUF  |d DG1  |d MOR  |d LIP  |d PIFAG  |d ZCU  |d OCLCQ  |d MERUC  |d OCLCQ  |d U3W  |d OCLCQ  |d STF  |d WRM  |d DEHBZ  |d ICG  |d INT  |d NRAMU  |d VT2  |d AU@  |d OCLCQ  |d WYU  |d OCLCQ  |d CUY  |d DKC  |d OCLCQ  |d UHL  |d OCLCQ  |d UKCRE  |d U9X  |d VLY  |d OCLCQ  |d OCLCO  |d VHC  |d OCLCQ  |d OCLCO  |d OCLCL  |d OCLCQ  |d OCLCL 
016 7 |a 015720524  |2 Uk 
019 |a 760411076  |a 816865359  |a 961625833  |a 962695105  |a 988520983  |a 988534721  |a 992040441  |a 1037796803  |a 1038624692  |a 1045532043  |a 1058084567  |a 1065820760  |a 1081275563  |a 1153553863  |a 1162005160  |a 1228618117  |a 1290039025  |a 1298452536  |a 1303459498 
020 |a 9781118146507  |q (electronic bk.) 
020 |a 1118146506  |q (electronic bk.) 
020 |a 9781118146538  |q (electronic bk.) 
020 |a 1118146530  |q (electronic bk.) 
020 |a 1283282887 
020 |a 9781283282888 
020 |z 9781118008881  |q (hbk.) 
020 |z 111800888X  |q (hbk.) 
020 |a 9786613282880 
020 |a 661328288X 
020 |a 1118146522 
020 |a 9781118146521 
024 8 |a 9786613282880 
029 1 |a AU@  |b 000055775423 
029 1 |a CHNEW  |b 000938320 
029 1 |a CHVBK  |b 480186278 
029 1 |a DEBBG  |b BV041905967 
029 1 |a DEBBG  |b BV043393571 
029 1 |a DEBBG  |b BV044159592 
029 1 |a DEBSZ  |b 372706355 
029 1 |a DEBSZ  |b 400439875 
029 1 |a DEBSZ  |b 43106735X 
029 1 |a NZ1  |b 14166180 
029 1 |a NZ1  |b 15341472 
029 1 |a AU@  |b 000060917958 
035 |a (OCoLC)757486963  |z (OCoLC)760411076  |z (OCoLC)816865359  |z (OCoLC)961625833  |z (OCoLC)962695105  |z (OCoLC)988520983  |z (OCoLC)988534721  |z (OCoLC)992040441  |z (OCoLC)1037796803  |z (OCoLC)1038624692  |z (OCoLC)1045532043  |z (OCoLC)1058084567  |z (OCoLC)1065820760  |z (OCoLC)1081275563  |z (OCoLC)1153553863  |z (OCoLC)1162005160  |z (OCoLC)1228618117  |z (OCoLC)1290039025  |z (OCoLC)1298452536  |z (OCoLC)1303459498 
050 4 |a TK7895.E42  |b C48 2011eb 
072 7 |a COM  |x 059000  |2 bisacsh 
072 7 |a COM  |x 067000  |2 bisacsh 
072 7 |a COM  |x 037000  |2 bisacsh 
072 7 |a TJFD  |2 bicssc 
082 0 4 |a 621.39/2  |2 23 
084 |a TEC008010  |2 bisacsh 
049 |a UAMI 
100 1 |a Chu, Pong P.,  |d 1959-  |1 https://id.oclc.org/worldcat/entity/E39PCjvcBJxWKwMHQb6XDrxQRq 
245 1 0 |a Embedded SOPC design with NIOS II processor and VHDL examples /  |c Pong P. Chu. 
260 |a Hoboken, N.J. :  |b Wiley,  |c ©2011. 
300 |a 1 online resource (xxxi, 703 pages) :  |b illustrations 
336 |a text  |b txt  |2 rdacontent 
337 |a computer  |b c  |2 rdamedia 
338 |a online resource  |b cr  |2 rdacarrier 
347 |a data file  |2 rda 
380 |a Bibliography 
505 0 |a Front Matter -- Overview of Embedded System -- Basic Digital Circuits Development. Gate-Level Combinational Circuit -- Overview of FPGA and EDA Software -- RT-Level Combinational Circuit -- Regular Sequential Circuit -- FSM -- FSMD -- Basic Nios II Software Development. Nios II Processor Overview -- Nios II System Derivation and Low-Level Access -- Predesigned Nios II I/O Peripherals -- Predesigned Nios II I/O Drivers and HAL API -- Interrupt and ISR -- Custom I/O Peripheral Development. Custom I/O Peripheral with PIO Cores -- Avalon Interconnect and SOPC Component -- SRAM and SDRAM Controllers -- PS2 Keyboard and Mouse -- VGA Controller -- Audio Codec Controller -- SD Card Controller -- Hardware Accelerator Case Studies. GCD Accelerator -- Mandelbrot Set Fractal Accelerator -- Direct Digital Frequency Synthesis -- References -- Index. 
520 |a "The book is divided into four major parts. Part I covers HDL constructs and synthesis of basic digital circuits. Part II provides an overview of embedded software development with the emphasis on low-level I/O access and drivers. Part III demonstrates the design and development of hardware and software for several complex I/O peripherals, including PS2 keyboard and mouse, a graphic video controller, an audio codec, and an SD (secure digital) card. Part IV provides three case studies of the integration of hardware accelerators, including a custom GCD (greatest common divisor) circuit, a Mandelbrot set fractal circuit, and an audio synthesizer based on DDFS (direct digital frequency synthesis) methodology.The book utilizes FPGA devices, Nios II soft-core processor, and development platform from Altera Co., which is one of the two main FPGA manufactures. Altera has a generous university program that provides free software and discounted prototyping boards for educational institutions (details at http://www.altera.com/university). The two main educational prototyping boards are known as DE1 ($99) and DE2 ($269). All experiments can be implemented and tested with these boards. A board combined with this book becomes a "turn-key" solution for the SoPC design experiments and projects. Most HDL and C codes in the book are device independent and can be adapted by other prototyping boards as long as a board has similar I/O configuration"--  |c Provided by publisher. 
504 |a Includes bibliographical references and index. 
588 0 |a Print version record. 
546 |a English. 
590 |a ProQuest Ebook Central  |b Ebook Central Academic Complete 
650 0 |a Systems on a chip. 
650 0 |a Field programmable gate arrays. 
650 0 |a Computer input-output equipment  |x Design and construction. 
650 0 |a VHDL (Computer hardware description language) 
650 6 |a Systèmes sur une puce. 
650 6 |a Réseaux logiques programmables par l'utilisateur. 
650 6 |a VHDL (Langage de description de matériel informatique) 
650 7 |a TECHNOLOGY & ENGINEERING  |x Electronics  |x Circuits  |x General.  |2 bisacsh 
650 7 |a COMPUTERS  |x Computer Engineering.  |2 bisacsh 
650 7 |a COMPUTERS  |x Hardware  |x General.  |2 bisacsh 
650 7 |a COMPUTERS  |x Machine Theory.  |2 bisacsh 
650 7 |a Computer input-output equipment  |x Design and construction  |2 fast 
650 7 |a Field programmable gate arrays  |2 fast 
650 7 |a Systems on a chip  |2 fast 
650 7 |a VHDL (Computer hardware description language)  |2 fast 
758 |i has work:  |a Embedded SOPC design with NIOS II processor and VHDL examples (Text)  |1 https://id.oclc.org/worldcat/entity/E39PCH8kpBR8DRtpJF4WcxKtVd  |4 https://id.oclc.org/worldcat/ontology/hasWork 
776 0 8 |i Print version:  |a Chu, Pong P., 1959-  |t Embedded SOPC design with NIOS II processor and VHDL examples.  |d Hoboken, N.J. : Wiley, ©2011  |z 9781118008881  |w (DLC) 2011022710  |w (OCoLC)682892489 
856 4 0 |u https://ebookcentral.uam.elogim.com/lib/uam-ebooks/detail.action?docID=817361  |z Texto completo 
938 |a Coutts Information Services  |b COUT  |n 19349291 
938 |a EBL - Ebook Library  |b EBLB  |n EBL817361 
938 |a ebrary  |b EBRY  |n ebr10560671 
938 |a EBSCOhost  |b EBSC  |n 401002 
938 |a ProQuest MyiLibrary Digital eBook Collection  |b IDEB  |n 328288 
938 |a YBP Library Services  |b YANK  |n 7010657 
938 |a YBP Library Services  |b YANK  |n 7462553 
994 |a 92  |b IZTAP