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Logic-timing Simulation And The Degradation Delay Model.
This book provides the reader with an extensive background in the field of logic-timing simulation and delay modeling. It includes detailed information on the challenges of logic-timing simulation, applications, advantages and drawbacks. The capabilities of logic-timing are explored using the latest...
| Clasificación: | Libro Electrónico |
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| Autor principal: | |
| Otros Autores: | , |
| Formato: | Electrónico eBook |
| Idioma: | Inglés |
| Publicado: |
Singapore :
World Scientific,
2005.
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| Temas: | |
| Acceso en línea: | Texto completo |
Tabla de Contenidos:
- Prologue; Preface; Contents; 1 Fundamentals of Timing Simulation; 2 Delay Models: Evolution and Trends; 3 Degradation and Inertial Effects; 4 CMOS Inverter Degradation Delay Model; 5 Gate-Level DDM; 6 Logic Level Simulator Design and Implementation; 7 DDM Simulation Results; 8 Accurate Measurement of the Switching Activity; References; Index.