|
|
|
|
LEADER |
00000cam a2200000Mu 4500 |
001 |
EBOOKCENTRAL_ocn437182903 |
003 |
OCoLC |
005 |
20240329122006.0 |
006 |
m o d |
007 |
cr mn|---||||| |
008 |
090817s2006 vtu o 000 0 eng d |
040 |
|
|
|a MERUC
|b eng
|e pn
|c MERUC
|d EBLCP
|d OCLCQ
|d IDEBK
|d DEBSZ
|d OCLCQ
|d ZCU
|d OCLCQ
|d MERUC
|d ICG
|d OCLCO
|d OCLCF
|d OCLCQ
|d OCLCO
|d OCLCQ
|d DKC
|d OCLCQ
|d OCLCO
|d OCLCQ
|d OCLCO
|d OCLCL
|
019 |
|
|
|a 476079878
|a 814452566
|a 823107521
|
020 |
|
|
|a 9780080525235
|q (electronic bk.)
|
020 |
|
|
|a 0080525237
|q (electronic bk.)
|
020 |
|
|
|a 1281023205
|
020 |
|
|
|a 9781281023209
|
029 |
1 |
|
|a DEBBG
|b BV044049423
|
029 |
1 |
|
|a DEBSZ
|b 43041160X
|
029 |
1 |
|
|a DEBSZ
|b 44909829X
|
029 |
1 |
|
|a DKDLA
|b 820120-katalog:999917206505765
|
035 |
|
|
|a (OCoLC)437182903
|z (OCoLC)476079878
|z (OCoLC)814452566
|z (OCoLC)823107521
|
050 |
|
4 |
|a QA76.9.A73
|a QA76.9.A73 S88 2007eb
|
072 |
|
7 |
|a UHPU
|2 bicssc
|
082 |
0 |
4 |
|a 004.165
|a 005.4469
|
049 |
|
|
|a UAMI
|
100 |
1 |
|
|a Sweetman, Dominic.
|
245 |
1 |
0 |
|a See MIPS Run.
|
260 |
|
|
|a Burlington :
|b Elsevier,
|c 2006.
|
300 |
|
|
|a 1 online resource (513 pages)
|
336 |
|
|
|a text
|b txt
|2 rdacontent
|
337 |
|
|
|a computer
|b c
|2 rdamedia
|
338 |
|
|
|a online resource
|b cr
|2 rdacarrier
|
505 |
0 |
|
|a Front Cover; See MIPS® Run; Copyright Page; Foreword; Contents; Preface; Chapter 1. RISCs and MIPS Architectures; Chapter 2. MIPS Architecture; Chapter 3. Coprocessor 0: MIPS Processor Control; Chapter 4. How CachesWork on MIPS Processors; Chapter 5. Exceptions, Interrupts, and Initialization; Chapter 6. Low-level Memory Management and the TLB; Chapter 7. Floating-Point Support; Chapter 8. Complete Guide to the MIPS Instruction Set; Chapter 9. Reading MIPS Assembly Language; Chapter 10. Porting Software to the MIPS Architecture; Chapter 11. MIPS Software Standards (ABIs).
|
505 |
8 |
|
|a Chapter 12. Debugging MIPS Designs--Debug and Profiling FeaturesChapter 13. GNU/Linux from Eight Miles High; Chapter 14. How Hardware and SoftwareWork Together; Chapter 15. MIPS Specific Issues in the Linux Kernel; Chapter 16. Linux Application Code, PIC, and Libraries; Appendix A. MIPS Multithreading; Appendix B. Other Optional Extensions to the MIPS Instruction Set; MIPS Glossary; References; Books and Articles; Online Resources; Index.
|
520 |
|
|
|a This second edition is not only a thorough update of the first edition, it is also a marriage of the best-known RISC architecture--MIPS--with the best-known open-source OS--Linux. The first part of the book begins with MIPS design principles and then describes the MIPS instruction set and programmers? resources. It uses the MIPS32 standard as a baseline (the 1st edition used the R3000) from which to compare all other versions of the architecture and assumes that MIPS64 is the main option. The second part is a significant change from the first edition. It provides concrete examples of operating.
|
588 |
0 |
|
|a Print version record.
|
590 |
|
|
|a ProQuest Ebook Central
|b Ebook Central Academic Complete
|
650 |
|
0 |
|a MIPS (Computer architecture)
|
650 |
|
0 |
|a RISC microprocessors.
|
650 |
|
0 |
|a Embedded computer systems
|x Programming.
|
650 |
|
6 |
|a MIPS (Architecture d'ordinateurs)
|
650 |
|
6 |
|a RISC (Microprocesseurs)
|
650 |
|
7 |
|a Embedded computer systems
|x Programming
|2 fast
|
650 |
|
7 |
|a MIPS (Computer architecture)
|2 fast
|
650 |
|
7 |
|a RISC microprocessors
|2 fast
|
758 |
|
|
|i has work:
|a See MIPS run (Text)
|1 https://id.oclc.org/worldcat/entity/E39PCH3ByCXhGQc77f7CkG3GBK
|4 https://id.oclc.org/worldcat/ontology/hasWork
|
776 |
1 |
|
|z 9780120884216
|
856 |
4 |
0 |
|u https://ebookcentral.uam.elogim.com/lib/uam-ebooks/detail.action?docID=300905
|z Texto completo
|
938 |
|
|
|a EBL - Ebook Library
|b EBLB
|n EBL300905
|
938 |
|
|
|a ProQuest MyiLibrary Digital eBook Collection
|b IDEB
|n 102320
|
994 |
|
|
|a 92
|b IZTAP
|