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|a Advanced manufacturing process, lead free interconnect materials and reliability modeling for electronics packaging /
|c guest editors Christopher Bailey and Johan Liu.
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|a Bradford, England :
|b Emerald Group Pub.,
|c ©2006.
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|a 1 online resource (72 pages)
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|a Soldering & surface mount technology,
|x 0954-0911 ;
|v v. 18, no. 2
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|a Includes bibliographical references.
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|a Print version record.
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|a Cover; Contents; Guest editorial; Coffin-Manson constant determination for a Sn-8Zn-3Bi lead-free solder joint; High strain rate testing of solder interconnections; Intermetallic compound formation and diffusion path evolution in eutectic tin-lead flip chip solder bumps after aging; Macro-micro modelling of moisture induced stresses in an ACF flip chip assembly; High performance anisotropic conductive adhesives for lead-free interconnects; Effect of curing conditions on the electrical properties of isotropic conductive adhesives composed of an epoxy-based binder.
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|a This issue of Soldering & Surface Mount Technology (SSMT) presents a number of papers from the 7th High Density Microsystems Design, Packaging and Failure Analysis (HDP'05) conference held in 2005 in the dynamic city of Shanghai, China. With over 100 high quality technical papers and presentation this annual conference brings together scholars and industrialists from Asia, Europe and the Americas to discuss the challenges and latest advances in high density packaging. This e-book contains six papers from the HDP conference, plus one additional contribution, which discuss the behaviour of key i.
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|a ProQuest Ebook Central
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|a Manufacturing processes.
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|a Electronic packaging.
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|a Fabrication.
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|a Mise sous boîtier (Électronique)
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|a Bailey, C.
|q (Chris)
|1 https://id.oclc.org/worldcat/entity/E39PCjBg6QTTy88f46yVTfk9H3
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|a Liu, Johan.
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|a Advanced manufacturing process, lead free interconnect materials and reliability modeling for electronics packaging (Text)
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|4 https://id.oclc.org/worldcat/ontology/hasWork
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|a Soldering & surface mount technology ;
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