VLSI 2010 Annual Symposium Selected papers /

This book intends to serve as a basis for presenting to young and experienced scientists the latest advances in VLSI technology and related areas, and how they can be effectively employed for the design of modern systems. All contributions to the book have been carefully written, focusing on the ped...

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Detalles Bibliográficos
Clasificación:Libro Electrónico
Autor Corporativo: SpringerLink (Online service)
Otros Autores: Voros, Nikolaos (Editor ), Mukherjee, Amar (Editor ), Sklavos, Nicolas (Editor ), Masselos, Konstantinos (Editor ), Huebner, Michael (Editor )
Formato: Electrónico eBook
Idioma:Inglés
Publicado: Dordrecht : Springer Netherlands : Imprint: Springer, 2011.
Edición:1st ed. 2011.
Colección:Lecture Notes in Electrical Engineering, 105
Temas:
Electronic circuits.
Computer engineering.
Computer networks .
Computer hardware description languages.
Computers.
Bioinformatics.
Electronics.
Electronic Circuits and Systems.
Computer Engineering and Networks.
Register-Transfer-Level Implementation.
Hardware Performance and Reliability.
Computational and Systems Biology.
Electronics and Microelectronics, Instrumentation.
Acceso en línea:Texto Completo
Tabla de Contenidos:
  • 1. Intelligent NOC Hotspot Prediction
  • 2. Accurate Asynchronous Network-on-Chip Simulation Based on a Delay-Aware Model
  • 3. Trust Management Through Hardware Means: Design Concerns and Optimizations
  • 4. MULTICUBE: Multi-Objective Design Space Exploration of Multi-Core Architectures
  • 5. 2PARMA: Parallel Paradigms and Run-time Management Techniques for Many-Core Architectures
  • 6. Adaptive Task Migration Policies for Thermal Control in MPSoCs
  • 7. A High Level Synthesis Exploration Framework with Iterative Design Space Partitioning
  • 8. A Scalable Bandwidth Aware Architecture for Connected Component Labelling
  • 9. The SATURN Approach to SysML-based HW/SW Codesign
  • 10. Mapping Embedded Applications on MPSoC - The MNEMEE approach
  • 11. The MOSART Mapping Optimisation for Scalable Multi-core ARchiTecture
  • 12. XMSIM: EXtensible Memory SIMulator for Early Memory Hierarchy Evaluation
  • 13. Self-Freeze Linear Decompressors: Test Pattern Generators for Low Power Scan Testing
  • 14. SUT-RNS Forward and Reverse Converters
  • 15. Off-Chip SDRAM Access Through Spidergon STNoC
  • 16. Digital Microfluidic Biochips: A Vision for Functional Diversity and More than Moore
  • 17. FPGA Startup through Sequential Partial and Dynamic Reconfiguration
  • 18. Two Dimensional Dynamic Multigrained Reconfigurable Hardware
  • 19. System Level Design for Embedded Reconfigurable Systems using MORPHEUS Platform
  • 20. New Dimensions in Design Space and Runtime Adaptivity for Multiprocessor Systems through Dynamic and Partial Reconfiguration: The RAMPSoC Approach.

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