Cargando…
Time-interleaved Analog-to-Digital Converters
Time-interleaved Analog-to-Digital Converters describes the research performed on low-power time-interleaved ADCs. A detailed theoretical analysis is made of the time-interleaved Track & Hold, since it must be capable of handling signals in the GHz range with little distortion, and minimal power...
| Clasificación: | Libro Electrónico |
|---|---|
| Autores principales: | , , |
| Autor Corporativo: | |
| Formato: | Electrónico eBook |
| Idioma: | Inglés |
| Publicado: |
Dordrecht :
Springer Netherlands : Imprint: Springer,
2011.
|
| Edición: | 1st ed. 2011. |
| Colección: | Analog Circuits and Signal Processing,
|
| Temas: | |
| Acceso en línea: | Texto Completo |
MARC
| LEADER | 00000nam a22000005i 4500 | ||
|---|---|---|---|
| 001 | 978-90-481-9716-3 | ||
| 003 | DE-He213 | ||
| 005 | 20220120065130.0 | ||
| 007 | cr nn 008mamaa | ||
| 008 | 100917s2011 ne | s |||| 0|eng d | ||
| 020 | |a 9789048197163 |9 978-90-481-9716-3 | ||
| 024 | 7 | |a 10.1007/978-90-481-9716-3 |2 doi | |
| 050 | 4 | |a TK7867-7867.5 | |
| 072 | 7 | |a TJFC |2 bicssc | |
| 072 | 7 | |a TEC008010 |2 bisacsh | |
| 072 | 7 | |a TJFC |2 thema | |
| 082 | 0 | 4 | |a 621.3815 |2 23 |
| 100 | 1 | |a Louwsma, Simon. |e author. |4 aut |4 http://id.loc.gov/vocabulary/relators/aut | |
| 245 | 1 | 0 | |a Time-interleaved Analog-to-Digital Converters |h [electronic resource] / |c by Simon Louwsma, Ed van Tuijl, Bram Nauta. |
| 250 | |a 1st ed. 2011. | ||
| 264 | 1 | |a Dordrecht : |b Springer Netherlands : |b Imprint: Springer, |c 2011. | |
| 300 | |a XVI, 136 p. |b online resource. | ||
| 336 | |a text |b txt |2 rdacontent | ||
| 337 | |a computer |b c |2 rdamedia | ||
| 338 | |a online resource |b cr |2 rdacarrier | ||
| 347 | |a text file |b PDF |2 rda | ||
| 490 | 1 | |a Analog Circuits and Signal Processing, |x 2197-1854 | |
| 520 | |a Time-interleaved Analog-to-Digital Converters describes the research performed on low-power time-interleaved ADCs. A detailed theoretical analysis is made of the time-interleaved Track & Hold, since it must be capable of handling signals in the GHz range with little distortion, and minimal power consumption. Timing calibration is not attractive, therefore design techniques are presented which do not require timing calibration. The design of power efficient sub-ADCs is addressed with a theoretical analysis of a successive approximation converter and a pipeline converter. It turns out that the first can consume about 10 times less power than the latter, and this conclusion is supported by literature. Time-interleaved Analog-to-Digital Converters describes the design of a high performance time-interleaved ADC, with much attention for practical design aspects, aiming at both industry and research. Measurements show best-inclass performance with a sample-rate of 1.8 GS/s, 7.9 ENOBs and a power efficiency of 1 pJ/conversion-step. | ||
| 650 | 0 | |a Electronic circuits. | |
| 650 | 1 | 4 | |a Electronic Circuits and Systems. |
| 700 | 1 | |a van Tuijl, Ed. |e author. |4 aut |4 http://id.loc.gov/vocabulary/relators/aut | |
| 700 | 1 | |a Nauta, Bram. |e author. |4 aut |4 http://id.loc.gov/vocabulary/relators/aut | |
| 710 | 2 | |a SpringerLink (Online service) | |
| 773 | 0 | |t Springer Nature eBook | |
| 776 | 0 | 8 | |i Printed edition: |z 9789048197156 |
| 776 | 0 | 8 | |i Printed edition: |z 9789400799516 |
| 776 | 0 | 8 | |i Printed edition: |z 9789048197170 |
| 830 | 0 | |a Analog Circuits and Signal Processing, |x 2197-1854 | |
| 856 | 4 | 0 | |u https://doi.uam.elogim.com/10.1007/978-90-481-9716-3 |z Texto Completo |
| 912 | |a ZDB-2-ENG | ||
| 912 | |a ZDB-2-SXE | ||
| 950 | |a Engineering (SpringerNature-11647) | ||
| 950 | |a Engineering (R0) (SpringerNature-43712) | ||