Emerging Technologies and Circuits

With the semiconductor market growth, new Integrated Circuit designs are pushing the limit of the technology and in some cases, require specific fine-tuning of certain process modules in manufacturing. Thus the communities of design and technology are increasingly intertwined. The issues that requir...

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Detalles Bibliográficos
Clasificación:Libro Electrónico
Autor Corporativo: SpringerLink (Online service)
Otros Autores: Amara, Amara (Editor ), Ea, Thomas (Editor ), Belleville, Marc (Editor )
Formato: Electrónico eBook
Idioma:Inglés
Publicado: Dordrecht : Springer Netherlands : Imprint: Springer, 2010.
Edición:1st ed. 2010.
Colección:Lecture Notes in Electrical Engineering, 66
Temas:
Electronic circuits.
Nanotechnology.
Computer storage devices.
Memory management (Computer science).
Electronic Circuits and Systems.
Computer Memory Structure.
Acceso en línea:Texto Completo
Tabla de Contenidos:
  • Synergy Between Design and Technology: A Key Factor in the Evolving Microelectronic Landscape
  • EMERGING TECHNOLOGY AND DEVICES
  • New State Variable Opportunities Beyond CMOS: A System Perspective
  • A Simple Compact Model to Analyze the Impact of Ballistic and Quasi-Ballistic Transport on Ring Oscillator Performance
  • ADVANCED DEVICES AND CIRUITS
  • Low-Voltage Scaled 6T FinFET SRAM Cells
  • Independent-Double-Gate FINFET SRAM Cell for Drastic Leakage Current Reduction
  • Metal Gate Effects on a 32 nm Metal Gate Resistor
  • RELIABILITY AND SEU
  • Threshold Voltage Shift Instability Induced by Plasma Charging Damage in MOSFETS with High-K Dielectric
  • Analysis of SI Substrate Damage Induced by Inductively Coupled Plasma Reactor with Various Superposed Bias Frequencies
  • POWER, TIMING AND VARIABILITY
  • CMOS SOI Technology for WPAN: Application to 60 GHZ LNA
  • SRAM Memory Cell Leakage Reduction Design Techniques in 65 nm Low Power PD-SOI CMOS
  • Resilient Circuits for Dynamic Variation Tolerance
  • Process Variability-Induced Timing Failures - A Challenge in Nanometer CMOS Low-Power Design
  • How Does Inverse Temperature Dependence Affect Timing Sign-Off
  • CMOS Logic Gates Leakage Modeling Under Statistical Process Variations
  • On-Chip Circuit Technique for Measuring Jitter and Skew with Picosecond Resolution
  • ANALOG AND MIXED SIGNAL
  • DC-DC Converter Technologies for On-Chip Distributed Power Supply Systems - 3D Stacking and Hybrid Operation
  • Sampled Analog Signal Processing: From Software-Defined to Software Radio.

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