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Network-on-Chip Architectures A Holistic Design Exploration /
The continuing reduction of feature sizes into the nanoscale regime has led to dramatic increases in transistor densities. Integration at these levels has highlighted the criticality of the on-chip interconnects. Network-on-Chip (NoC) architectures are viewed as a possible solution to burgeoning glo...
| Clasificación: | Libro Electrónico |
|---|---|
| Autores principales: | , , |
| Autor Corporativo: | |
| Formato: | Electrónico eBook |
| Idioma: | Inglés |
| Publicado: |
Dordrecht :
Springer Netherlands : Imprint: Springer,
2010.
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| Edición: | 1st ed. 2010. |
| Colección: | Lecture Notes in Electrical Engineering,
45 |
| Temas: | |
| Acceso en línea: | Texto Completo |