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|a 9789048129065
|9 978-90-481-2906-5
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|a 10.1007/978-90-481-2906-5
|2 doi
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|a TK7867-7867.5
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|a TJFC
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|a TEC008010
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|a 621.3815
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|a McConaghy, Trent.
|e author.
|4 aut
|4 http://id.loc.gov/vocabulary/relators/aut
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|a Variation-Aware Analog Structural Synthesis
|h [electronic resource] :
|b A Computational Intelligence Approach /
|c by Trent McConaghy, Pieter Palmers, Gao Peng, Michiel Steyaert, Georges Gielen.
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|a 1st ed. 2009.
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|a Dordrecht :
|b Springer Netherlands :
|b Imprint: Springer,
|c 2009.
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|a XXI, 305 p.
|b online resource.
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|a text
|b txt
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|a computer
|b c
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|a online resource
|b cr
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|a text file
|b PDF
|2 rda
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|a Analog Circuits and Signal Processing,
|x 2197-1854
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|a Variation-Aware Sizing: Background -- Globally Reliable, Variation-Aware Sizing: Sangria -- Knowledge Extraction in Sizing: Caffeine -- Circuit Topology Synthesis: Background -- Trustworthy Topology Synthesis: MOJITO Search Space -- Trustworthy Topology Synthesis: MOJITO Algorithm -- Knowledge Extraction in Topology Synthesis -- Variation-Aware Topology Synthesis and Knowledge Extraction -- Novel Variation-Aware Topology Synthesis -- Conclusion.
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|a Variation-Aware Analog Structural Synthesis describes computational intelligence-based tools for robust design of analog circuits. It starts with global variation-aware sizing and knowledge extraction, and progressively extends to variation-aware topology design. The computational intelligence techniques developed in this book generalize beyond analog CAD, to domains such as robotics, financial engineering, automotive design, and more. The tools are for: Globally-reliable variation-aware automated sizing via SANGRIA, leveraging structural homotopy and response surface modeling. Template-free symbolic models via CAFFEINE canonical form functions, for greater insight into the relationship between design/process variables and circuit performance/robustness. Topology selection and topology synthesis via MOJITO. 30 well-known analog building blocks are hierarchically combined, leading to >100,000 different possible topologies which are all trustworthy by construction. MOJITO does multi-objective genetic programming-based search across these topologies with SPICE accuracy, to return a set of sized topologies on the optimal performance/yield tradeoff curve. Nonlinear sensitivity analysis, topology decision trees, and analytical tradeoffs. With a data-mining perspective on Pareto-optimal topologies, this book shows how to do global nonlinear sensitivity analysis on topology and sizing variables, automatically extract a specs-to-topology decision tree, and determine analytical expressions of performance tradeoffs. Novel topology design. The MOJITO-N and ISCLEs tools generate novel yet trustworthy topologies; including boosting digitally-sized circuits for analog functionality.
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|a Electronic circuits.
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|a Computer science.
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|a Artificial intelligence.
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|a Electronic Circuits and Systems.
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|a Theory of Computation.
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|a Artificial Intelligence.
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700 |
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|a Palmers, Pieter.
|e author.
|4 aut
|4 http://id.loc.gov/vocabulary/relators/aut
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700 |
1 |
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|a Peng, Gao.
|e author.
|4 aut
|4 http://id.loc.gov/vocabulary/relators/aut
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700 |
1 |
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|a Steyaert, Michiel.
|e author.
|4 aut
|4 http://id.loc.gov/vocabulary/relators/aut
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700 |
1 |
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|a Gielen, Georges.
|e author.
|4 aut
|4 http://id.loc.gov/vocabulary/relators/aut
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710 |
2 |
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|a SpringerLink (Online service)
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773 |
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|t Springer Nature eBook
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|i Printed edition:
|z 9789048129072
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776 |
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|i Printed edition:
|z 9789400726086
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776 |
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|i Printed edition:
|z 9789048129058
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830 |
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|a Analog Circuits and Signal Processing,
|x 2197-1854
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856 |
4 |
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|u https://doi.uam.elogim.com/10.1007/978-90-481-2906-5
|z Texto Completo
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912 |
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|a ZDB-2-ENG
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912 |
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|a ZDB-2-SXE
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950 |
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|a Engineering (SpringerNature-11647)
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950 |
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|a Engineering (R0) (SpringerNature-43712)
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