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Variation-Aware Analog Structural Synthesis A Computational Intelligence Approach /

Variation-Aware Analog Structural Synthesis describes computational intelligence-based tools for robust design of analog circuits. It starts with global variation-aware sizing and knowledge extraction, and progressively extends to variation-aware topology design. The computational intelligence techn...

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Detalles Bibliográficos
Clasificación:Libro Electrónico
Autores principales: McConaghy, Trent (Autor), Palmers, Pieter (Autor), Peng, Gao (Autor), Steyaert, Michiel (Autor), Gielen, Georges (Autor)
Autor Corporativo: SpringerLink (Online service)
Formato: Electrónico eBook
Idioma:Inglés
Publicado: Dordrecht : Springer Netherlands : Imprint: Springer, 2009.
Edición:1st ed. 2009.
Colección:Analog Circuits and Signal Processing,
Temas:
Acceso en línea:Texto Completo

MARC

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490 1 |a Analog Circuits and Signal Processing,  |x 2197-1854 
505 0 |a Variation-Aware Sizing: Background -- Globally Reliable, Variation-Aware Sizing: Sangria -- Knowledge Extraction in Sizing: Caffeine -- Circuit Topology Synthesis: Background -- Trustworthy Topology Synthesis: MOJITO Search Space -- Trustworthy Topology Synthesis: MOJITO Algorithm -- Knowledge Extraction in Topology Synthesis -- Variation-Aware Topology Synthesis and Knowledge Extraction -- Novel Variation-Aware Topology Synthesis -- Conclusion. 
520 |a Variation-Aware Analog Structural Synthesis describes computational intelligence-based tools for robust design of analog circuits. It starts with global variation-aware sizing and knowledge extraction, and progressively extends to variation-aware topology design. The computational intelligence techniques developed in this book generalize beyond analog CAD, to domains such as robotics, financial engineering, automotive design, and more. The tools are for: Globally-reliable variation-aware automated sizing via SANGRIA, leveraging structural homotopy and response surface modeling. Template-free symbolic models via CAFFEINE canonical form functions, for greater insight into the relationship between design/process variables and circuit performance/robustness. Topology selection and topology synthesis via MOJITO. 30 well-known analog building blocks are hierarchically combined, leading to >100,000 different possible topologies which are all trustworthy by construction. MOJITO does multi-objective genetic programming-based search across these topologies with SPICE accuracy, to return a set of sized topologies on the optimal performance/yield tradeoff curve. Nonlinear sensitivity analysis, topology decision trees, and analytical tradeoffs. With a data-mining perspective on Pareto-optimal topologies, this book shows how to do global nonlinear sensitivity analysis on topology and sizing variables, automatically extract a specs-to-topology decision tree, and determine analytical expressions of performance tradeoffs. Novel topology design. The MOJITO-N and ISCLEs tools generate novel yet trustworthy topologies; including boosting digitally-sized circuits for analog functionality. 
650 0 |a Electronic circuits. 
650 0 |a Computer science. 
650 0 |a Artificial intelligence. 
650 1 4 |a Electronic Circuits and Systems. 
650 2 4 |a Theory of Computation. 
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700 1 |a Peng, Gao.  |e author.  |4 aut  |4 http://id.loc.gov/vocabulary/relators/aut 
700 1 |a Steyaert, Michiel.  |e author.  |4 aut  |4 http://id.loc.gov/vocabulary/relators/aut 
700 1 |a Gielen, Georges.  |e author.  |4 aut  |4 http://id.loc.gov/vocabulary/relators/aut 
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