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Digital Logic Design Using Verilog Coding and RTL Synthesis /

This book is designed to serve as a hands-on professional reference with additional utility as a textbook for upper undergraduate and some graduate courses in digital logic design. This book is organized in such a way that that it can describe a number of RTL design scenarios, from simple to complex...

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Detalles Bibliográficos
Clasificación:Libro Electrónico
Autor principal: Taraate, Vaibbhav (Autor)
Autor Corporativo: SpringerLink (Online service)
Formato: Electrónico eBook
Idioma:Inglés
Publicado: New Delhi : Springer India : Imprint: Springer, 2016.
Edición:1st ed. 2016.
Temas:
Acceso en línea:Texto Completo
Tabla de Contenidos:
  • Introduction
  • Combinational Logic Design (Part I)
  • Combinational Logic Design (Part II)
  • Combinational Design Guidelines
  • Sequential Logic Design
  • Sequential Design Guidelines
  • Complex Designs using Verilog RTL
  • Finite State Machines
  • Simulation Concepts and PLD Based Designs
  • RTL Synthesis
  • Static Timing Analysis (STA)
  • Constraining Design
  • Multiple Clock Domain Designs
  • Low Power Design
  • RTL Design for SOCs.