Cargando…

Digital Logic Design Using Verilog Coding and RTL Synthesis /

This book is designed to serve as a hands-on professional reference with additional utility as a textbook for upper undergraduate and some graduate courses in digital logic design. This book is organized in such a way that that it can describe a number of RTL design scenarios, from simple to complex...

Descripción completa

Detalles Bibliográficos
Clasificación:Libro Electrónico
Autor principal: Taraate, Vaibbhav (Autor)
Autor Corporativo: SpringerLink (Online service)
Formato: Electrónico eBook
Idioma:Inglés
Publicado: New Delhi : Springer India : Imprint: Springer, 2016.
Edición:1st ed. 2016.
Temas:
Acceso en línea:Texto Completo

MARC

LEADER 00000nam a22000005i 4500
001 978-81-322-2791-5
003 DE-He213
005 20220116153122.0
007 cr nn 008mamaa
008 160517s2016 ii | s |||| 0|eng d
020 |a 9788132227915  |9 978-81-322-2791-5 
024 7 |a 10.1007/978-81-322-2791-5  |2 doi 
050 4 |a TK7867-7867.5 
072 7 |a TJFC  |2 bicssc 
072 7 |a TEC008010  |2 bisacsh 
072 7 |a TJFC  |2 thema 
082 0 4 |a 621.3815  |2 23 
100 1 |a Taraate, Vaibbhav.  |e author.  |4 aut  |4 http://id.loc.gov/vocabulary/relators/aut 
245 1 0 |a Digital Logic Design Using Verilog  |h [electronic resource] :  |b Coding and RTL Synthesis /  |c by Vaibbhav Taraate. 
250 |a 1st ed. 2016. 
264 1 |a New Delhi :  |b Springer India :  |b Imprint: Springer,  |c 2016. 
300 |a XXIII, 416 p. 267 illus., 226 illus. in color.  |b online resource. 
336 |a text  |b txt  |2 rdacontent 
337 |a computer  |b c  |2 rdamedia 
338 |a online resource  |b cr  |2 rdacarrier 
347 |a text file  |b PDF  |2 rda 
505 0 |a Introduction -- Combinational Logic Design (Part I) -- Combinational Logic Design (Part II) -- Combinational Design Guidelines -- Sequential Logic Design -- Sequential Design Guidelines -- Complex Designs using Verilog RTL -- Finite State Machines -- Simulation Concepts and PLD Based Designs -- RTL Synthesis -- Static Timing Analysis (STA) -- Constraining Design -- Multiple Clock Domain Designs -- Low Power Design -- RTL Design for SOCs. 
520 |a This book is designed to serve as a hands-on professional reference with additional utility as a textbook for upper undergraduate and some graduate courses in digital logic design. This book is organized in such a way that that it can describe a number of RTL design scenarios, from simple to complex. The book constructs the logic design story from the fundamentals of logic design to advanced RTL design concepts. Keeping in view the importance of miniaturization today, the book gives practical information on the issues with ASIC RTL design and how to overcome these concerns. It clearly explains how to write an efficient RTL code and how to improve design performance. The book also describes advanced RTL design concepts such as low-power design, multiple clock-domain design, and SOC-based design. The practical orientation of the book makes it ideal for training programs for practicing design engineers and for short-term vocational programs. The contents of the book will also make it a useful read for students and hobbyists. . 
650 0 |a Electronic circuits. 
650 0 |a Electronics. 
650 0 |a Logic design. 
650 1 4 |a Electronic Circuits and Systems. 
650 2 4 |a Electronics and Microelectronics, Instrumentation. 
650 2 4 |a Logic Design. 
710 2 |a SpringerLink (Online service) 
773 0 |t Springer Nature eBook 
776 0 8 |i Printed edition:  |z 9788132227892 
776 0 8 |i Printed edition:  |z 9788132227908 
776 0 8 |i Printed edition:  |z 9788132238386 
856 4 0 |u https://doi.uam.elogim.com/10.1007/978-81-322-2791-5  |z Texto Completo 
912 |a ZDB-2-ENG 
912 |a ZDB-2-SXE 
950 |a Engineering (SpringerNature-11647) 
950 |a Engineering (R0) (SpringerNature-43712)