High Performance Embedded Architectures and Compilers 5th International Conference, HiPEAC 2010, Pisa, Italy, January 25-27, 2010, Proceedings /

This book constitutes the refereed proceedings of the 5th International Conference on High Performance Embedded Architectures and Compilers, HiPEAC 2010, held in Pisa, Italy, in January 2010. The 23 revised full papers presented together with the abstracts of 2 invited keynote addresses were careful...

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Detalles Bibliográficos
Clasificación:Libro Electrónico
Autor Corporativo: SpringerLink (Online service)
Otros Autores: Patt, Yale N. (Editor ), Foglia, Pierfrancesco (Editor ), Duesterwald, Evelyn (Editor ), Faraboschi, Paolo (Editor ), Martorell, Xavier (Editor )
Formato: Electrónico eBook
Idioma:Inglés
Publicado: Berlin, Heidelberg : Springer Berlin Heidelberg : Imprint: Springer, 2010.
Edición:1st ed. 2010.
Colección:Theoretical Computer Science and General Issues, 5952
Temas:
Computer programming.
Computer arithmetic and logic units.
Microprocessors.
Computer architecture.
Computer input-output equipment.
Logic design.
Computer networks .
Programming Techniques.
Arithmetic and Logic Structures.
Processor Architectures.
Input/Output and Data Communications.
Logic Design.
Computer Communication Networks.
Acceso en línea:Texto Completo
Descripción
Sumario:This book constitutes the refereed proceedings of the 5th International Conference on High Performance Embedded Architectures and Compilers, HiPEAC 2010, held in Pisa, Italy, in January 2010. The 23 revised full papers presented together with the abstracts of 2 invited keynote addresses were carefully reviewed and selected from 94 submissions. The papers are organized in topical sections on architectural support for concurrency; compilation and runtime systems; reconfigurable and customized architectures; multicore efficiency, reliability, and power; memory organization and optimization; and programming and analysis of accelerators.
Descripción Física:XIII, 370 p. online resource.
ISBN:9783642115158
ISSN:2512-2029 ;

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