Analysis, Architectures and Modelling of Embedded Systems Third IFIP TC 10 International Embedded Systems Symposium, IESS 2009, Langenargen, Germany, September 14-16, 2009, Proceedings /

This book constitutes the refereed proceedings of the third IFIP TC 10 International Embedded Systems Symposium, IESS 2009, held in Langenargen, Germany, in September 2009. The 28 revised papers were selected from 46 submissions. The papers are organized in topical sections on modelling; transaction...

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Detalles Bibliográficos
Clasificación:Libro Electrónico
Autor Corporativo: SpringerLink (Online service)
Otros Autores: Rettberg, Achim (Editor ), Zanella, Mauro C. (Editor ), Amann, Michael (Editor ), Keckeisen, Michael (Editor ), Rammig, Franz J. (Editor )
Formato: Electrónico eBook
Idioma:Inglés
Publicado: Berlin, Heidelberg : Springer Berlin Heidelberg : Imprint: Springer, 2009.
Edición:1st ed. 2009.
Colección:IFIP Advances in Information and Communication Technology, 310
Temas:
Artificial intelligence.
Computer-aided engineering.
User interfaces (Computer systems).
Human-computer interaction.
Computers, Special purpose.
Electronic digital computers-Evaluation.
Computer engineering.
Computer networks .
Artificial Intelligence.
Computer-Aided Engineering (CAD, CAE) and Design.
User Interfaces and Human Computer Interaction.
Special Purpose and Application-Based Systems.
System Performance and Evaluation.
Computer Engineering and Networks.
Acceso en línea:Texto Completo
Tabla de Contenidos:
  • Modelling
  • State Machine Based Method for Consolidating Vehicle Data
  • Automatic HW/SW Interface Modeling for Scratch-Pad and Memory Mapped HW Components in Native Source-Code Co-simulation
  • Modelling of Device Driver Software by Reflection of the Device Hardware Structure
  • An Infrastructure for UML-Based Code Generation Tools
  • A Configurable TLM of Wireless Sensor Networks for Fast Exploration of System Communication Performance
  • ConcurrenC: A New Approach towards Effective Abstraction of C-Based SLDLs
  • Transaction Level Modelling
  • Automatic Generation of Cycle-Approximate TLMs with Timed RTOS Model Support
  • Transaction Level Modeling of Best-Effort Channels for Networked Embedded Devices
  • Modeling Cache Effects at the Transaction Level
  • Scheduling and Real-Time Systems
  • Event Stream Calculus for Schedulability Analysis
  • Real-Time Scheduling in Heterogeneous Systems Considering Cache Reload Time Using Genetic Algorithms
  • Task-Dependent Processor Shutdown for Hard Real-Time Systems
  • Experimental Evaluation of a Hybrid Approach for Deriving Service-Time Bounds of Methods in Real-Time Distributed Computing Objects
  • Simulation, Verification and Test
  • Efficient Parallel Transaction Level Simulation by Exploiting Temporal Decoupling
  • Formal Verification for Embedded Systems Design Based on MDE
  • Systematic Model-in-the-Loop Test of Embedded Control Systems
  • Platforms and Processors
  • Proteus, a Hybrid Virtualization Platform for Embedded Systems
  • Constructing a Multi-OS Platform with Minimal Engineering Cost
  • A Synchronization Method for Register Traces of Pipelined Processors
  • Automotive Systems
  • Development of Automotive Communication Based Real-Time Systems - A Steer-by-Wire Case Study
  • Automatic Transformation of System Models in Automotive Electronics
  • Towards a Load Balancing Middleware for Automotive Infotainment Systems
  • Case Studies
  • Towards an Irritable Bowel Syndrome Control System Based on Artificial Neural Networks
  • A Hybrid Hardware and Software Component Architecture for Embedded System Design
  • Low-Level Space Optimization of an AES Implementation for a Bit-Serial Fully Pipelined Architecture
  • Wireless Sensor Networks
  • The Case for Interpreted Languages in Sensor Networks
  • Characterization of Inaccessibility in Wireless Networks: A Case Study on IEEE 802.15.4 Standard
  • FemtoNode: Reconfigurable and Customizable Architecture for Wireless Sensor Networks
  • Tutorials
  • Efficient Modeling of Embedded Systems Using Computer-Aided Recoding
  • New Challenges for Designers of Fault Tolerant Embedded Systems Based on Future Technologies.

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