Cryptographic Hardware and Embedded Systems - CHES 2009 11th International Workshop Lausanne, Switzerland, September 6-9, 2009 Proceedings /
This book constitutes the refereed proceedings of the 11th International Workshop on Cryptographic Hardware and Embedded Systems, CHES 2009, held in Lausanne, Switzerland during September 6-9, 2009. The book contains 3 invited talks and 29 revised full papers which were carefully reviewed and select...
Clasificación: | Libro Electrónico |
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Autor Corporativo: | |
Otros Autores: | , |
Formato: | Electrónico eBook |
Idioma: | Inglés |
Publicado: |
Berlin, Heidelberg :
Springer Berlin Heidelberg : Imprint: Springer,
2009.
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Edición: | 1st ed. 2009. |
Colección: | Security and Cryptology ;
5747 |
Temas: | |
Acceso en línea: | Texto Completo |
Tabla de Contenidos:
- Software Implementations
- Faster and Timing-Attack Resistant AES-GCM
- Accelerating AES with Vector Permute Instructions
- SSE Implementation of Multivariate PKCs on Modern x86 CPUs
- MicroEliece: McEliece for Embedded Devices
- Invited Talk 1
- Physical Unclonable Functions and Secure Processors
- Side Channel Analysis of Secret Key Cryptosystems
- Practical Electromagnetic Template Attack on HMAC
- First-Order Side-Channel Attacks on the Permutation Tables Countermeasure
- Algebraic Side-Channel Attacks on the AES: Why Time also Matters in DPA
- Differential Cluster Analysis
- Side Channel Analysis of Public Key Cryptosystems
- Known-Plaintext-Only Attack on RSA-CRT with Montgomery Multiplication
- A New Side-Channel Attack on RSA Prime Generation
- Side Channel and Fault Analysis Countermeasures
- An Efficient Method for Random Delay Generation in Embedded Software
- Higher-Order Masking and Shuffling for Software Implementations of Block Ciphers
- A Design Methodology for a DPA-Resistant Cryptographic LSI with RSL Techniques
- A Design Flow and Evaluation Framework for DPA-Resistant Instruction Set Extensions
- Invited Talk 2
- Crypto Engineering: Some History and Some Case Studies
- Pairing-Based Cryptography
- Hardware Accelerator for the Tate Pairing in Characteristic Three Based on Karatsuba-Ofman Multipliers
- Faster -Arithmetic for Cryptographic Pairings on Barreto-Naehrig Curves
- Designing an ASIP for Cryptographic Pairings over Barreto-Naehrig Curves
- New Ciphers and Efficient Implementations
- KATAN and KTANTAN - A Family of Small and Efficient Hardware-Oriented Block Ciphers
- Programmable and Parallel ECC Coprocessor Architecture: Tradeoffs between Area, Speed and Security
- Elliptic Curve Scalar Multiplication Combining Yao's Algorithm and Double Bases
- TRNGs and Device Identification
- The Frequency Injection Attack on Ring-Oscillator-Based True Random Number Generators
- Low-Overhead Implementation of a Soft Decision Helper Data Algorithm for SRAM PUFs
- CDs Have Fingerprints Too
- Invited Talk 3
- The State-of-the-Art in IC Reverse Engineering
- Hot Topic Session: Hardware Trojans and Trusted ICs
- Trojan Side-Channels: Lightweight Hardware Trojans through Side-Channel Engineering
- MERO: A Statistical Approach for Hardware Trojan Detection
- Theoretical Aspects
- On Tamper-Resistance from a Theoretical Viewpoint
- Mutual Information Analysis: How, When and Why?
- Fault Analysis
- Fault Attacks on RSA Signatures with Partially Unknown Messages
- Differential Fault Analysis on DES Middle Rounds.