Languages and Compilers for Parallel Computing 19th International Workshop, LCPC 2006, New Orleans, LA, USA, November 2-4, 2006, Revised Papers /

The 19th Workshop on Languages and Compilers for Parallel Computing was heldinNovember2006inNewOrleans,LouisianaUSA.Morethan40researchers from around the world gathered together to present their latest results and to exchange ideas on topics ranging from parallel programming models, code generation,...

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Detalles Bibliográficos
Clasificación:Libro Electrónico
Autor Corporativo: SpringerLink (Online service)
Otros Autores: Almási, Gheorghe (Editor ), Cascaval, Calin (Editor ), Wu, Peng (Editor )
Formato: Electrónico eBook
Idioma:Inglés
Publicado: Berlin, Heidelberg : Springer Berlin Heidelberg : Imprint: Springer, 2007.
Edición:1st ed. 2007.
Colección:Theoretical Computer Science and General Issues, 4382
Temas:
Compilers (Computer programs).
Computer programming.
Computer science.
Computer networks .
Computer arithmetic and logic units.
Artificial intelligence-Data processing.
Compilers and Interpreters.
Programming Techniques.
Theory of Computation.
Computer Communication Networks.
Arithmetic and Logic Structures.
Data Science.
Acceso en línea:Texto Completo
Tabla de Contenidos:
  • Keynote I
  • Compilation Techniques for Partitioned Global Address Space Languages
  • Session 1: Programming Models
  • Can Transactions Enhance Parallel Programs?
  • Design and Use of htalib - A Library for Hierarchically Tiled Arrays
  • SP@CE - An SP-Based Programming Model for Consumer Electronics Streaming Applications
  • Session 2: Code Generation
  • Data Pipeline Optimization for Shared Memory Multiple-SIMD Architecture
  • Dependence-Based Code Generation for a CELL Processor
  • Expression and Loop Libraries for High-Performance Code Synthesis
  • Applying Code Specialization to FFT Libraries for Integral Parameters
  • Session 3: Parallelism
  • A Characterization of Shared Data Access Patterns in UPC Programs
  • Exploiting Speculative Thread-Level Parallelism in Data Compression Applications
  • On Control Signals for Multi-Dimensional Time
  • Keynote II
  • The Berkeley View: A New Framework and a New Platform for Parallel Research
  • Session 4: Compilation Techniques
  • An Effective Heuristic for Simple Offset Assignment with Variable Coalescing
  • Iterative Compilation with Kernel Exploration
  • Quantifying Uncertainty in Points-To Relations
  • Session 5: Data Structures
  • Cache Behavior Modelling for Codes Involving Banded Matrices
  • Tree-Traversal Orientation Analysis
  • UTS: An Unbalanced Tree Search Benchmark
  • Session 6: Register Allocation
  • Copy Propagation Optimizations for VLIW DSP Processors with Distributed Register Files
  • Optimal Bitwise Register Allocation Using Integer Linear Programming
  • Register Allocation: What Does the NP-Completeness Proof of Chaitin et al. Really Prove? Or Revisiting Register Allocation: Why and How
  • Session 7: Memory Management
  • Custom Memory Allocation for Free
  • Optimizing the Use of Static Buffers for DMA on a CELL Chip
  • Runtime Address Space Computation for SDSM Systems
  • A Static Heap Analysis for Shape and Connectivity: Unified Memory Analysis: The Base Framework.

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