Power-Aware Computer Systems 4th International Workshop, PACS 2004, Portland, OR, USA, December 5, 2004, Revised Selected Papers /
Welcome to the proceedings of the Power-Aware Computer Systems (PACS 2004) workshop held in conjunction with the 37th Annual International Sym- sium on Microarchitecture (MICRO-37). The continued increase of power and energy dissipation in computer systems has resulted in higher cost, lower re- abil...
Clasificación: | Libro Electrónico |
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Autor Corporativo: | |
Otros Autores: | , |
Formato: | Electrónico eBook |
Idioma: | Inglés |
Publicado: |
Berlin, Heidelberg :
Springer Berlin Heidelberg : Imprint: Springer,
2005.
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Edición: | 1st ed. 2005. |
Colección: | Theoretical Computer Science and General Issues,
3471 |
Temas: | |
Acceso en línea: | Texto Completo |
Tabla de Contenidos:
- Microarchitecture- and Circuit-Level Techniques
- An Optimized Front-End Physical Register File with Banking and Writeback Filtering
- Reducing Delay and Power Consumption of the Wakeup Logic Through Instruction Packing and Tag Memoization
- Bit-Sliced Datapath for Energy-Efficient High Performance Microprocessors
- Low-Overhead Core Swapping for Thermal Management
- Power-Aware Memory and Interconnect Systems
- Software-Hardware Cooperative Power Management for Main Memory
- Energy-Aware Data Prefetching for General-Purpose Programs
- Bus Power Estimation and Power-Efficient Bus Arbitration for System-on-a-Chip Embedded Systems
- Context-Independent Codes for Off-Chip Interconnects
- Frequency-/Voltage-Scaling Techniques
- Dynamic Processor Throttling for Power Efficient Computations
- Effective Dynamic Voltage Scaling Through CPU-Boundedness Detection
- Safe Overprovisioning: Using Power Limits to Increase Aggregate Throughput
- Power Consumption Breakdown on a Modern Laptop
- Erratum
- Erratum.