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00000nam a22000005i 4500 |
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978-3-319-32759-4 |
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160621s2016 sz | s |||| 0|eng d |
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|a 9783319327594
|9 978-3-319-32759-4
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|a 10.1007/978-3-319-32759-4
|2 doi
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|a 621.3815
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|a Spiridon, Silvian.
|e author.
|4 aut
|4 http://id.loc.gov/vocabulary/relators/aut
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|a Toward 5G Software Defined Radio Receiver Front-Ends
|h [electronic resource] /
|c by Silvian Spiridon.
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|a 1st ed. 2016.
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|a Cham :
|b Springer International Publishing :
|b Imprint: Springer,
|c 2016.
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|a XVII, 96 p. 50 illus., 20 illus. in color.
|b online resource.
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|a text
|b txt
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|a computer
|b c
|2 rdamedia
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|a online resource
|b cr
|2 rdacarrier
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|a text file
|b PDF
|2 rda
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|a SpringerBriefs in Electrical and Computer Engineering,
|x 2191-8120
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|a Overview of Wireless Communication in the Internet Age -- Defining the optimal architecture -- From High Level Standard Requirements to Circuit Level Electrical Specifications: A Standard Independent Approach -- Optimal Filter Partitioning -- Smart Gain Partitioning for Noise - Linearity Trade-Off Optimization -- SDRX Electrical Specifications -- A System Level Perspective of Modern Receiver Building Blocks -- Conclusions and Future Developers.
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|a This book introduces a new intuitive design methodology for the optimal design path for next-generation software defined radio front-ends (SDRXs). The methodology described empowers designers to "attack" the multi-standard environment in a parallel way rather than serially, providing a critical tool for any design methodology targeting 5G circuits and systems. Throughout the book the SDRX design follows the key wireless standards of the moment (i.e., GSM, WCDMA, LTE, Bluetooth, WLAN), since a receiver compatible with these standards is the most likely candidate for the first design iteration in a 5G deployment. The author explains the fundamental choice the designer has to make regarding the optimal channel selection: how much of the blockers/interferers will be filtered in the analog domain and how much will remain to be filtered in the digital domain. The system-level analysis the author describes entails the direct sampling architecture is treated as a particular case of mixer-based direct conversion architecture. This allows readers give a power consumption budget to determine how much filtering is required on the receive path, by considering the ADC performance characteristics and the corresponding blocker diagram.
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|a Electronic circuits.
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|a Signal processing.
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|a Electronics.
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|a Electronic Circuits and Systems.
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|a Signal, Speech and Image Processing .
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|a Electronics and Microelectronics, Instrumentation.
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|a SpringerLink (Online service)
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|t Springer Nature eBook
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|i Printed edition:
|z 9783319327587
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|i Printed edition:
|z 9783319327600
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830 |
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|a SpringerBriefs in Electrical and Computer Engineering,
|x 2191-8120
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|u https://doi.uam.elogim.com/10.1007/978-3-319-32759-4
|z Texto Completo
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|a ZDB-2-ENG
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|a ZDB-2-SXE
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|a Engineering (SpringerNature-11647)
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950 |
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|a Engineering (R0) (SpringerNature-43712)
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