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Near Threshold Computing Technology, Methods and Applications /
This book explores near-threshold computing (NTC), a design-space using techniques to run digital chips (processors) near the lowest possible voltage. Readers will be enabled with specific techniques to design chips that are extremely robust; tolerating variability and resilient against errors. Va...
| Clasificación: | Libro Electrónico |
|---|---|
| Autor Corporativo: | |
| Otros Autores: | , |
| Formato: | Electrónico eBook |
| Idioma: | Inglés |
| Publicado: |
Cham :
Springer International Publishing : Imprint: Springer,
2016.
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| Edición: | 1st ed. 2016. |
| Temas: | |
| Acceso en línea: | Texto Completo |
MARC
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| 024 | 7 | |a 10.1007/978-3-319-23389-5 |2 doi | |
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| 245 | 1 | 0 | |a Near Threshold Computing |h [electronic resource] : |b Technology, Methods and Applications / |c edited by Michael Hübner, Cristina Silvano. |
| 250 | |a 1st ed. 2016. | ||
| 264 | 1 | |a Cham : |b Springer International Publishing : |b Imprint: Springer, |c 2016. | |
| 300 | |a IX, 101 p. 56 illus., 37 illus. in color. |b online resource. | ||
| 336 | |a text |b txt |2 rdacontent | ||
| 337 | |a computer |b c |2 rdamedia | ||
| 338 | |a online resource |b cr |2 rdacarrier | ||
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| 505 | 0 | |a PART I: NTC opportunities, challenges and limits -- Chapter 1: Extreme Energy Efficiency by Near Threshold Voltage Operation -- Part II Micro-architecture challenges and energy management at NTC -- Chapter2: Many-core Architecture for NTC: Energy Efficiency from the Ground Up -- Chapter 3: Variability-Aware Voltage Island Management for Near-Threshold Voltage Computing With Performance Guarantees -- Part III Memory system design for NTC -- Chapter4: Resizable Data Composer (RDC) Cache: A Near-Threshold Cache tolerating Process Variation Via architectural fault tolerance -- Chapter 5 Memories for NTC. | |
| 520 | |a This book explores near-threshold computing (NTC), a design-space using techniques to run digital chips (processors) near the lowest possible voltage. Readers will be enabled with specific techniques to design chips that are extremely robust; tolerating variability and resilient against errors. Variability-aware voltage and frequency allocation schemes will be presented that will provide performance guarantees, when moving toward near-threshold manycore chips. · Provides an introduction to near-threshold computing, enabling reader with a variety of tools to face the challenges of the power/utilization wall; · Demonstrates how to design efficient voltage regulation, so that each region of the chip can operate at the most efficient voltage and frequency point; · Investigates how performance guarantees can be ensured when moving towards NTC manycores through variability-aware voltage and frequency allocation schemes. . | ||
| 650 | 0 | |a Electronic circuits. | |
| 650 | 0 | |a Microprocessors. | |
| 650 | 0 | |a Computer architecture. | |
| 650 | 1 | 4 | |a Electronic Circuits and Systems. |
| 650 | 2 | 4 | |a Processor Architectures. |
| 700 | 1 | |a Hübner, Michael. |e editor. |4 edt |4 http://id.loc.gov/vocabulary/relators/edt | |
| 700 | 1 | |a Silvano, Cristina. |e editor. |4 edt |4 http://id.loc.gov/vocabulary/relators/edt | |
| 710 | 2 | |a SpringerLink (Online service) | |
| 773 | 0 | |t Springer Nature eBook | |
| 776 | 0 | 8 | |i Printed edition: |z 9783319233888 |
| 776 | 0 | 8 | |i Printed edition: |z 9783319233901 |
| 776 | 0 | 8 | |i Printed edition: |z 9783319372099 |
| 856 | 4 | 0 | |u https://doi.uam.elogim.com/10.1007/978-3-319-23389-5 |z Texto Completo |
| 912 | |a ZDB-2-ENG | ||
| 912 | |a ZDB-2-SXE | ||
| 950 | |a Engineering (SpringerNature-11647) | ||
| 950 | |a Engineering (R0) (SpringerNature-43712) | ||