Hardware and Software: Verification and Testing 10th International Haifa Verification Conference, HVC 2014, Haifa, Israel, November 18-20, 2014, Proceedings /

This book constitutes the refereed proceedings of the 10th International Haifa Verification Conference, HVC 2014, held in Haifa, Israel, in November 2014. The 17 revised full papers and 4 short papers presented were carefully reviewed and selected from 43 submissions. The papers cover a wide range o...

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Detalles Bibliográficos
Clasificación:Libro Electrónico
Autor Corporativo: SpringerLink (Online service)
Otros Autores: Yahav, Eran (Editor )
Formato: Electrónico eBook
Idioma:Inglés
Publicado: Cham : Springer International Publishing : Imprint: Springer, 2014.
Edición:1st ed. 2014.
Colección:Programming and Software Engineering, 8855
Temas:
Software engineering.
Computer science.
Compilers (Computer programs).
Artificial intelligence.
Machine theory.
Computer networks .
Software Engineering.
Computer Science Logic and Foundations of Programming.
Compilers and Interpreters.
Artificial Intelligence.
Formal Languages and Automata Theory.
Computer Communication Networks.
Acceso en línea:Texto Completo
Tabla de Contenidos:
  • Using Coarse-Grained Abstractions to Verify Linearizability on TSO Architectures
  • Enhancing Scenario Quality Using Quasi-Events
  • Combined Bounded and Symbolic Model Checking for Incomplete Timed Systems
  • DynaMate: Dynamically Inferring Loop Invariants for Automatic Full Functional Verification
  • Generating Modulo-2 Linear Invariants for Hardware Model Checking
  • Suraq - A Controller Synthesis Tool Using Uninterpreted Functions
  • Synthesizing Finite-State Protocols from Scenarios and Requirements
  • Automatic Error Localization for Software Using Deductive Verification
  • Generating JML Specifications from Alloy Expressions
  • Assume-Guarantee Abstraction Refinement Meets Hybrid Systems
  • Handling TSO in Mechanized Linearizability Proofs
  • Partial Quantifier Elimination
  • Formal Verification of 800 Genetically Constructed Automata Programs: A Case Study
  • A Framework to Synergize Partial Order Reduction with State Interpolation
  • Reduction of Resolution Refutations and Interpolants via Subsumption
  • Read, Write and Copy Dependencies for Symbolic Model Checking
  • Efficient Combinatorial Test Generation Based on Multivalued Decision Diagrams
  • Formal Verification of Secure User Mode Device Execution with DMA
  • Supervisory Control of Discrete-Event Systems via IC3
  • Partial-Order Reduction for Multi-core LTL Model Checking
  • A Comparative Study of Incremental Constraint Solving Approaches in Symbolic Execution.

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