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Low-Noise Low-Power Design for Phase-Locked Loops Multi-Phase High-Performance Oscillators /
This book introduces low-noise and low-power design techniques for phase-locked loops and their building blocks. It summarizes the noise reduction techniques for fractional-N PLL design and introduces a novel capacitive-quadrature coupling technique for multi-phase signal generation. The capacitive...
| Clasificación: | Libro Electrónico |
|---|---|
| Autores principales: | , |
| Autor Corporativo: | |
| Formato: | Electrónico eBook |
| Idioma: | Inglés |
| Publicado: |
Cham :
Springer International Publishing : Imprint: Springer,
2015.
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| Edición: | 1st ed. 2015. |
| Temas: | |
| Acceso en línea: | Texto Completo |
MARC
| LEADER | 00000nam a22000005i 4500 | ||
|---|---|---|---|
| 001 | 978-3-319-12200-7 | ||
| 003 | DE-He213 | ||
| 005 | 20220116150433.0 | ||
| 007 | cr nn 008mamaa | ||
| 008 | 141125s2015 sz | s |||| 0|eng d | ||
| 020 | |a 9783319122007 |9 978-3-319-12200-7 | ||
| 024 | 7 | |a 10.1007/978-3-319-12200-7 |2 doi | |
| 050 | 4 | |a TK7867-7867.5 | |
| 072 | 7 | |a TJFC |2 bicssc | |
| 072 | 7 | |a TEC008010 |2 bisacsh | |
| 072 | 7 | |a TJFC |2 thema | |
| 082 | 0 | 4 | |a 621.3815 |2 23 |
| 100 | 1 | |a Zhao, Feng. |e author. |4 aut |4 http://id.loc.gov/vocabulary/relators/aut | |
| 245 | 1 | 0 | |a Low-Noise Low-Power Design for Phase-Locked Loops |h [electronic resource] : |b Multi-Phase High-Performance Oscillators / |c by Feng Zhao, Fa Foster Dai. |
| 250 | |a 1st ed. 2015. | ||
| 264 | 1 | |a Cham : |b Springer International Publishing : |b Imprint: Springer, |c 2015. | |
| 300 | |a XIII, 96 p. 73 illus., 24 illus. in color. |b online resource. | ||
| 336 | |a text |b txt |2 rdacontent | ||
| 337 | |a computer |b c |2 rdamedia | ||
| 338 | |a online resource |b cr |2 rdacarrier | ||
| 347 | |a text file |b PDF |2 rda | ||
| 505 | 0 | |a Introduction -- Analysis of Quantization Noise Reduction Techniques for Fractional-N PLL -- A Wide-Band 0.13µm SiGe BiCMOS PLL for X-Band Radar -- Design and Analysis of QVCO with Different Coupling Techniques -- Design and Analysis of a 0.6V QVCO with Capacitive-Coupling Technique -- Conclusions. | |
| 520 | |a This book introduces low-noise and low-power design techniques for phase-locked loops and their building blocks. It summarizes the noise reduction techniques for fractional-N PLL design and introduces a novel capacitive-quadrature coupling technique for multi-phase signal generation. The capacitive-coupling technique has been validated through silicon implementation and can provide low phase-noise and accurate I-Q phase matching, with low power consumption from a super low supply voltage. Readers will be enabled to pick one of the most suitable QVCO circuit structures for their own designs, without additional effort to look for the optimal circuit structure and device parameters. . | ||
| 650 | 0 | |a Electronic circuits. | |
| 650 | 0 | |a Electronics. | |
| 650 | 0 | |a Signal processing. | |
| 650 | 1 | 4 | |a Electronic Circuits and Systems. |
| 650 | 2 | 4 | |a Electronics and Microelectronics, Instrumentation. |
| 650 | 2 | 4 | |a Signal, Speech and Image Processing . |
| 700 | 1 | |a Dai, Fa Foster. |e author. |4 aut |4 http://id.loc.gov/vocabulary/relators/aut | |
| 710 | 2 | |a SpringerLink (Online service) | |
| 773 | 0 | |t Springer Nature eBook | |
| 776 | 0 | 8 | |i Printed edition: |z 9783319121994 |
| 776 | 0 | 8 | |i Printed edition: |z 9783319122014 |
| 776 | 0 | 8 | |i Printed edition: |z 9783319343709 |
| 856 | 4 | 0 | |u https://doi.uam.elogim.com/10.1007/978-3-319-12200-7 |z Texto Completo |
| 912 | |a ZDB-2-ENG | ||
| 912 | |a ZDB-2-SXE | ||
| 950 | |a Engineering (SpringerNature-11647) | ||
| 950 | |a Engineering (R0) (SpringerNature-43712) | ||