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Noise-Shaping All-Digital Phase-Locked Loops Modeling, Simulation, Analysis and Design /

This book presents a novel approach to the analysis and design of all-digital phase-locked loops (ADPLLs), technology widely used in wireless communication devices. The authors provide an overview of ADPLL architectures, time-to-digital converters (TDCs) and noise shaping. Realistic examples illustr...

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Detalles Bibliográficos
Clasificación:Libro Electrónico
Autores principales: Brandonisio, Francesco (Autor), Kennedy, Michael Peter (Autor)
Autor Corporativo: SpringerLink (Online service)
Formato: Electrónico eBook
Idioma:Inglés
Publicado: Cham : Springer International Publishing : Imprint: Springer, 2014.
Edición:1st ed. 2014.
Colección:Analog Circuits and Signal Processing,
Temas:
Acceso en línea:Texto Completo

MARC

LEADER 00000nam a22000005i 4500
001 978-3-319-03659-5
003 DE-He213
005 20220127111418.0
007 cr nn 008mamaa
008 131217s2014 sz | s |||| 0|eng d
020 |a 9783319036595  |9 978-3-319-03659-5 
024 7 |a 10.1007/978-3-319-03659-5  |2 doi 
050 4 |a TK7867-7867.5 
072 7 |a TJFC  |2 bicssc 
072 7 |a TEC008010  |2 bisacsh 
072 7 |a TJFC  |2 thema 
082 0 4 |a 621.3815  |2 23 
100 1 |a Brandonisio, Francesco.  |e author.  |4 aut  |4 http://id.loc.gov/vocabulary/relators/aut 
245 1 0 |a Noise-Shaping All-Digital Phase-Locked Loops  |h [electronic resource] :  |b Modeling, Simulation, Analysis and Design /  |c by Francesco Brandonisio, Michael Peter Kennedy. 
250 |a 1st ed. 2014. 
264 1 |a Cham :  |b Springer International Publishing :  |b Imprint: Springer,  |c 2014. 
300 |a XIII, 177 p. 145 illus., 79 illus. in color.  |b online resource. 
336 |a text  |b txt  |2 rdacontent 
337 |a computer  |b c  |2 rdamedia 
338 |a online resource  |b cr  |2 rdacarrier 
347 |a text file  |b PDF  |2 rda 
490 1 |a Analog Circuits and Signal Processing,  |x 2197-1854 
505 0 |a Introduction -- Phase Digitization in All-Digital PLLs -- A Unifying Framework for TDC Architectures -- Analytical Predictions of Phase Noise in ADPLLs -- Advantages of Noise Shaping and Dither -- Efficient Modeling and Simulation of Accumulator-Based ADPLLs -- Modelling and Estimating Phase Noise with Matlab. 
520 |a This book presents a novel approach to the analysis and design of all-digital phase-locked loops (ADPLLs), technology widely used in wireless communication devices. The authors provide an overview of ADPLL architectures, time-to-digital converters (TDCs) and noise shaping. Realistic examples illustrate how to analyze and simulate phase noise in the presence of sigma-delta modulation and time-to-digital conversion. Readers will gain a deep understanding of ADPLLs and the central role played by noise-shaping. A range of ADPLL and TDC architectures are presented in unified manner. Analytical and simulation tools are discussed in detail. Matlab code is included that can be reused to design, simulate and analyze the ADPLL architectures that are presented in the book.   • Discusses in detail a wide range of all-digital phase-locked loops architectures; • Presents a unified framework in which to model time-to-digital converters for ADPLLs; • Explains a procedure to predict and simulate phase noise in oscillators and ADPLLs; • Describes an efficient approach to model ADPLLS; • Includes Matlab code to reproduce the examples in the book. 
650 0 |a Electronic circuits. 
650 0 |a Signal processing. 
650 0 |a Electronics. 
650 1 4 |a Electronic Circuits and Systems. 
650 2 4 |a Signal, Speech and Image Processing . 
650 2 4 |a Electronics and Microelectronics, Instrumentation. 
700 1 |a Kennedy, Michael Peter.  |e author.  |4 aut  |4 http://id.loc.gov/vocabulary/relators/aut 
710 2 |a SpringerLink (Online service) 
773 0 |t Springer Nature eBook 
776 0 8 |i Printed edition:  |z 9783319036601 
776 0 8 |i Printed edition:  |z 9783319036588 
776 0 8 |i Printed edition:  |z 9783319344416 
830 0 |a Analog Circuits and Signal Processing,  |x 2197-1854 
856 4 0 |u https://doi.uam.elogim.com/10.1007/978-3-319-03659-5  |z Texto Completo 
912 |a ZDB-2-ENG 
912 |a ZDB-2-SXE 
950 |a Engineering (SpringerNature-11647) 
950 |a Engineering (R0) (SpringerNature-43712)