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Synthesizable VHDL Design for FPGAs
This book provides a gradual description of very-high-speed integrated circuits hardware description language (VHDL), targeting the design of digital systems to be implemented in field-programmable gate array (FPGA) platforms. It is organized in a very didactic way. The adopted methodolgy was mature...
| Clasificación: | Libro Electrónico |
|---|---|
| Autores principales: | , |
| Autor Corporativo: | |
| Formato: | Electrónico eBook |
| Idioma: | Inglés |
| Publicado: |
Cham :
Springer International Publishing : Imprint: Springer,
2014.
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| Edición: | 1st ed. 2014. |
| Temas: | |
| Acceso en línea: | Texto Completo |
MARC
| LEADER | 00000nam a22000005i 4500 | ||
|---|---|---|---|
| 001 | 978-3-319-02547-6 | ||
| 003 | DE-He213 | ||
| 005 | 20220126133407.0 | ||
| 007 | cr nn 008mamaa | ||
| 008 | 131021s2014 sz | s |||| 0|eng d | ||
| 020 | |a 9783319025476 |9 978-3-319-02547-6 | ||
| 024 | 7 | |a 10.1007/978-3-319-02547-6 |2 doi | |
| 050 | 4 | |a TK7867-7867.5 | |
| 072 | 7 | |a TJFC |2 bicssc | |
| 072 | 7 | |a TEC008010 |2 bisacsh | |
| 072 | 7 | |a TJFC |2 thema | |
| 082 | 0 | 4 | |a 621.3815 |2 23 |
| 100 | 1 | |a Bezerra, Eduardo Augusto. |e author. |4 aut |4 http://id.loc.gov/vocabulary/relators/aut | |
| 245 | 1 | 0 | |a Synthesizable VHDL Design for FPGAs |h [electronic resource] / |c by Eduardo Augusto Bezerra, Djones Vinicius Lettnin. |
| 250 | |a 1st ed. 2014. | ||
| 264 | 1 | |a Cham : |b Springer International Publishing : |b Imprint: Springer, |c 2014. | |
| 300 | |a VII, 157 p. 174 illus. |b online resource. | ||
| 336 | |a text |b txt |2 rdacontent | ||
| 337 | |a computer |b c |2 rdamedia | ||
| 338 | |a online resource |b cr |2 rdacarrier | ||
| 347 | |a text file |b PDF |2 rda | ||
| 505 | 0 | |a Digital Systems, FPGAs and the Design Flow -- HDL Based Designs -- Hierarchical Design -- Multiplexer and Demultiplexer -- Code Converters -- Sequential Circuits, Latches and Flip-Flops -- Synthesis of Finite State Machines -- Finite State Machines as Control Modules -- Processes in Details -- Arithmetic Circuits -- VHDL Design Examples for FPGA Synthesis. | |
| 520 | |a This book provides a gradual description of very-high-speed integrated circuits hardware description language (VHDL), targeting the design of digital systems to be implemented in field-programmable gate array (FPGA) platforms. It is organized in a very didactic way. The adopted methodolgy was matured over 20 years of teaching experience in the subject. The examples in the book were planned targeting two FPGA platforms, one used widely around the world and the other one developed by a Brazilian company. | ||
| 650 | 0 | |a Electronic circuits. | |
| 650 | 0 | |a Electronics. | |
| 650 | 0 | |a Software engineering. | |
| 650 | 1 | 4 | |a Electronic Circuits and Systems. |
| 650 | 2 | 4 | |a Electronics and Microelectronics, Instrumentation. |
| 650 | 2 | 4 | |a Software Engineering. |
| 700 | 1 | |a Lettnin, Djones Vinicius. |e author. |4 aut |4 http://id.loc.gov/vocabulary/relators/aut | |
| 710 | 2 | |a SpringerLink (Online service) | |
| 773 | 0 | |t Springer Nature eBook | |
| 776 | 0 | 8 | |i Printed edition: |z 9783319025483 |
| 776 | 0 | 8 | |i Printed edition: |z 9783319025469 |
| 776 | 0 | 8 | |i Printed edition: |z 9783319377339 |
| 856 | 4 | 0 | |u https://doi.uam.elogim.com/10.1007/978-3-319-02547-6 |z Texto Completo |
| 912 | |a ZDB-2-ENG | ||
| 912 | |a ZDB-2-SXE | ||
| 950 | |a Engineering (SpringerNature-11647) | ||
| 950 | |a Engineering (R0) (SpringerNature-43712) | ||