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Source-Synchronous Networks-On-Chip Circuit and Architectural Interconnect Modeling /
This book describes novel methods for network-on-chip (NoC) design, using source-synchronous high-speed resonant clocks. The authors discuss NoCs from the bottom up, providing circuit level details, before providing architectural simulations. As a result, readers will get a complete picture of how...
| Clasificación: | Libro Electrónico |
|---|---|
| Autores principales: | , , |
| Autor Corporativo: | |
| Formato: | Electrónico eBook |
| Idioma: | Inglés |
| Publicado: |
New York, NY :
Springer New York : Imprint: Springer,
2014.
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| Edición: | 1st ed. 2014. |
| Temas: | |
| Acceso en línea: | Texto Completo |
Tabla de Contenidos:
- Introduction
- Clock Distribution for fast Networks-on-Chip
- Fast Network-on-Chip Design
- Fast On-Chip Data transfer using Sinusoid Signals
- Conclusion and Future Work.