Cargando…

Embedded Memory Design for Multi-Core and Systems on Chip

This book describes the various tradeoffs systems designers face when designing embedded memory.  Readers designing multi-core systems and systems on chip will benefit from the discussion of different topics from memory architecture, array organization, circuit design techniques and design for test....

Descripción completa

Detalles Bibliográficos
Clasificación:Libro Electrónico
Autor principal: Mohammad, Baker (Autor)
Autor Corporativo: SpringerLink (Online service)
Formato: Electrónico eBook
Idioma:Inglés
Publicado: New York, NY : Springer New York : Imprint: Springer, 2014.
Edición:1st ed. 2014.
Colección:Analog Circuits and Signal Processing, 116
Temas:
Acceso en línea:Texto Completo

MARC

LEADER 00000nam a22000005i 4500
001 978-1-4614-8881-1
003 DE-He213
005 20220118004219.0
007 cr nn 008mamaa
008 131022s2014 xxu| s |||| 0|eng d
020 |a 9781461488811  |9 978-1-4614-8881-1 
024 7 |a 10.1007/978-1-4614-8881-1  |2 doi 
050 4 |a TK7867-7867.5 
072 7 |a TJFC  |2 bicssc 
072 7 |a TEC008010  |2 bisacsh 
072 7 |a TJFC  |2 thema 
082 0 4 |a 621.3815  |2 23 
100 1 |a Mohammad, Baker.  |e author.  |4 aut  |4 http://id.loc.gov/vocabulary/relators/aut 
245 1 0 |a Embedded Memory Design for Multi-Core and Systems on Chip  |h [electronic resource] /  |c by Baker Mohammad. 
250 |a 1st ed. 2014. 
264 1 |a New York, NY :  |b Springer New York :  |b Imprint: Springer,  |c 2014. 
300 |a XIII, 95 p. 63 illus., 37 illus. in color.  |b online resource. 
336 |a text  |b txt  |2 rdacontent 
337 |a computer  |b c  |2 rdamedia 
338 |a online resource  |b cr  |2 rdacarrier 
347 |a text file  |b PDF  |2 rda 
490 1 |a Analog Circuits and Signal Processing,  |x 2197-1854 ;  |v 116 
505 0 |a Introduction -- Cache Architecture and Main Blocks -- Embedded Memory Hierarchy -- SRAM Memory Operation and Yield -- Low Power and High Yield SRAM Memory -- Leakage Reduction -- Embedded Memory Verification -- Embedded Memory Design Validation and Design For Test -- Emerging Memory Technology Opportunities and Challenges. 
520 |a This book describes the various tradeoffs systems designers face when designing embedded memory.  Readers designing multi-core systems and systems on chip will benefit from the discussion of different topics from memory architecture, array organization, circuit design techniques and design for test.  The presentation enables a multi-disciplinary approach to chip design, which bridges the gap between the architecture level and circuit level, in order to address yield, reliability and power-related issues for embedded memory.  ·         Provides a comprehensive overview of embedded memory design and associated challenges and choices; ·         Explains tradeoffs and dependencies across different disciplines involved with multi-core and system on chip memory design; ·         Includes detailed discussion of memory hierarchy and its impact on energy and performance; ·         Uses real product examples to demonstrate embedded memory design flow from architecture, to circuit design, design for test and yield analysis. 
650 0 |a Electronic circuits. 
650 0 |a Electronics. 
650 0 |a Microprocessors. 
650 0 |a Computer architecture. 
650 1 4 |a Electronic Circuits and Systems. 
650 2 4 |a Electronics and Microelectronics, Instrumentation. 
650 2 4 |a Processor Architectures. 
710 2 |a SpringerLink (Online service) 
773 0 |t Springer Nature eBook 
776 0 8 |i Printed edition:  |z 9781461488828 
776 0 8 |i Printed edition:  |z 9781461488804 
776 0 8 |i Printed edition:  |z 9781493948017 
830 0 |a Analog Circuits and Signal Processing,  |x 2197-1854 ;  |v 116 
856 4 0 |u https://doi.uam.elogim.com/10.1007/978-1-4614-8881-1  |z Texto Completo 
912 |a ZDB-2-ENG 
912 |a ZDB-2-SXE 
950 |a Engineering (SpringerNature-11647) 
950 |a Engineering (R0) (SpringerNature-43712)