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An ASIC Low Power Primer Analysis, Techniques and Specification /
This book provides an invaluable primer on the techniques utilized in the design of low power digital semiconductor devices. Readers will benefit from the hands-on approach which starts form the ground-up, explaining with basic examples what power is, how it is measured and how it impacts on the de...
| Clasificación: | Libro Electrónico |
|---|---|
| Autores principales: | , |
| Autor Corporativo: | |
| Formato: | Electrónico eBook |
| Idioma: | Inglés |
| Publicado: |
New York, NY :
Springer New York : Imprint: Springer,
2013.
|
| Edición: | 1st ed. 2013. |
| Temas: | |
| Acceso en línea: | Texto Completo |
MARC
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| 100 | 1 | |a Chadha, Rakesh. |e author. |4 aut |4 http://id.loc.gov/vocabulary/relators/aut | |
| 245 | 1 | 3 | |a An ASIC Low Power Primer |h [electronic resource] : |b Analysis, Techniques and Specification / |c by Rakesh Chadha, J. Bhasker. |
| 250 | |a 1st ed. 2013. | ||
| 264 | 1 | |a New York, NY : |b Springer New York : |b Imprint: Springer, |c 2013. | |
| 300 | |a XIV, 218 p. |b online resource. | ||
| 336 | |a text |b txt |2 rdacontent | ||
| 337 | |a computer |b c |2 rdamedia | ||
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| 505 | 0 | |a Introduction -- Modeling of Power in Core Logic -- Modeling of Power in IOS and Micro Blocks -- Power and Analysis in ASCIS -- Design Intent for Power Management -- Architectural Techniques for Low Power -- Low Power Implementation Techniques -- UPF Power Specification -- CPF Power Specification -- Appendix A -- Appendix B -- Bibliography -- Index. . | |
| 520 | |a This book provides an invaluable primer on the techniques utilized in the design of low power digital semiconductor devices. Readers will benefit from the hands-on approach which starts form the ground-up, explaining with basic examples what power is, how it is measured and how it impacts on the design process of application-specific integrated circuits (ASICs). The authors use both the Unified Power Format (UPF) and Common Power Format (CPF) to describe in detail the power intent for an ASIC and then guide readers through a variety of architectural and implementation techniques that will help meet the power intent. From analyzing system power consumption, to techniques that can employed in a low power design, to a detailed description of two alternate standards for capturing the power directives at various phases of the design, this book is filled with information that will give ASIC designers a competitive edge in low-power design. Starts from the ground-up and explains what power is, how it is measured and how it impacts on the ASIC design process; Provides essential information in an easy to read and understand format, using basic examples; Explains what power intent is, how to describe it precisely and what techniques can be used to achieve the power intent with the two key standards, the Unified Power Format (UPF) and Common Power Format (CPF). . | ||
| 650 | 0 | |a Electronic circuits. | |
| 650 | 0 | |a Electronics. | |
| 650 | 0 | |a Microprocessors. | |
| 650 | 0 | |a Computer architecture. | |
| 650 | 1 | 4 | |a Electronic Circuits and Systems. |
| 650 | 2 | 4 | |a Electronics and Microelectronics, Instrumentation. |
| 650 | 2 | 4 | |a Processor Architectures. |
| 700 | 1 | |a Bhasker, J. |e author. |4 aut |4 http://id.loc.gov/vocabulary/relators/aut | |
| 710 | 2 | |a SpringerLink (Online service) | |
| 773 | 0 | |t Springer Nature eBook | |
| 776 | 0 | 8 | |i Printed edition: |z 9781461442721 |
| 776 | 0 | 8 | |i Printed edition: |z 9781489991508 |
| 776 | 0 | 8 | |i Printed edition: |z 9781461442707 |
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| 912 | |a ZDB-2-SXE | ||
| 950 | |a Engineering (SpringerNature-11647) | ||
| 950 | |a Engineering (R0) (SpringerNature-43712) | ||