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Design for Manufacturability From 1D to 4D for 90-22 nm Technology Nodes /
This book explains integrated circuit design for manufacturability (DfM) at the product level (packaging, applications) and applies engineering DfM principles to the latest standards of product development at 22 nm technology nodes. It is a valuable guide for layout designers, packaging engineers a...
| Clasificación: | Libro Electrónico |
|---|---|
| Autor principal: | |
| Autor Corporativo: | |
| Formato: | Electrónico eBook |
| Idioma: | Inglés |
| Publicado: |
New York, NY :
Springer New York : Imprint: Springer,
2014.
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| Edición: | 1st ed. 2014. |
| Temas: | |
| Acceso en línea: | Texto Completo |
MARC
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| 001 | 978-1-4614-1761-3 | ||
| 003 | DE-He213 | ||
| 005 | 20220115235813.0 | ||
| 007 | cr nn 008mamaa | ||
| 008 | 131005s2014 xxu| s |||| 0|eng d | ||
| 020 | |a 9781461417613 |9 978-1-4614-1761-3 | ||
| 024 | 7 | |a 10.1007/978-1-4614-1761-3 |2 doi | |
| 050 | 4 | |a TK7867-7867.5 | |
| 072 | 7 | |a TJFC |2 bicssc | |
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| 072 | 7 | |a TJFC |2 thema | |
| 082 | 0 | 4 | |a 621.3815 |2 23 |
| 100 | 1 | |a Balasinski, Artur. |e author. |4 aut |4 http://id.loc.gov/vocabulary/relators/aut | |
| 245 | 1 | 0 | |a Design for Manufacturability |h [electronic resource] : |b From 1D to 4D for 90-22 nm Technology Nodes / |c by Artur Balasinski. |
| 250 | |a 1st ed. 2014. | ||
| 264 | 1 | |a New York, NY : |b Springer New York : |b Imprint: Springer, |c 2014. | |
| 300 | |a VIII, 278 p. 214 illus., 45 illus. in color. |b online resource. | ||
| 336 | |a text |b txt |2 rdacontent | ||
| 337 | |a computer |b c |2 rdamedia | ||
| 338 | |a online resource |b cr |2 rdacarrier | ||
| 347 | |a text file |b PDF |2 rda | ||
| 505 | 0 | |a Preface -- Classic DfM: from 2D to 3D -- DfM at 28 nm and Beyond -- New DfM Domain: Stress Effects -- Conclusions and Future Work. | |
| 520 | |a This book explains integrated circuit design for manufacturability (DfM) at the product level (packaging, applications) and applies engineering DfM principles to the latest standards of product development at 22 nm technology nodes. It is a valuable guide for layout designers, packaging engineers and quality engineers, covering DfM development from 1D to 4D, involving IC design flow setup, best practices, links to manufacturing and product definition, for process technologies down to 22 nm node, and product families including memories, logic, system-on-chip and system-in-package. · Provides design for manufacturability guidelines on layout techniques for the most advanced, 22 nm technology nodes; · Includes information valuable to layout designers, packaging engineers and quality engineers, working on memories, logic, system-on-chip and system-in-package; · Offers a highly-accessible, single-source reference to information otherwise available only from disparate sources; · Helps readers to translate reliability methodology into real design flows. | ||
| 650 | 0 | |a Electronic circuits. | |
| 650 | 0 | |a Electronics. | |
| 650 | 0 | |a Security systems. | |
| 650 | 1 | 4 | |a Electronic Circuits and Systems. |
| 650 | 2 | 4 | |a Electronics and Microelectronics, Instrumentation. |
| 650 | 2 | 4 | |a Security Science and Technology. |
| 710 | 2 | |a SpringerLink (Online service) | |
| 773 | 0 | |t Springer Nature eBook | |
| 776 | 0 | 8 | |i Printed edition: |z 9781461417620 |
| 776 | 0 | 8 | |i Printed edition: |z 9781461417606 |
| 776 | 0 | 8 | |i Printed edition: |z 9781493943425 |
| 776 | 0 | 8 | |i Printed edition: |z 9781071603994 |
| 856 | 4 | 0 | |u https://doi.uam.elogim.com/10.1007/978-1-4614-1761-3 |z Texto Completo |
| 912 | |a ZDB-2-ENG | ||
| 912 | |a ZDB-2-SXE | ||
| 950 | |a Engineering (SpringerNature-11647) | ||
| 950 | |a Engineering (R0) (SpringerNature-43712) | ||