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Variation Tolerant On-Chip Interconnects
This book presents design techniques, analysis and implementation of high performance and power efficient, variation tolerant on-chip interconnects. Given the design paradigm shift to multi-core, interconnect-centric designs and the increase in sources of variability and their impact in sub-100nm t...
| Clasificación: | Libro Electrónico |
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| Autor principal: | |
| Autor Corporativo: | |
| Formato: | Electrónico eBook |
| Idioma: | Inglés |
| Publicado: |
New York, NY :
Springer New York : Imprint: Springer,
2012.
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| Edición: | 1st ed. 2012. |
| Colección: | Analog Circuits and Signal Processing,
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| Temas: | |
| Acceso en línea: | Texto Completo |
Tabla de Contenidos:
- Introduction
- On-Chip Communication
- Interconnect Design Techniques
- Design of Delay-Insensitive Current Sensing Interconnects
- Enhancing Completion Detection Performance
- Energy Efficient Semi-Serial Interconnect
- Comparison of the Designed Interconnects
- Circuit Techniques for PVT Variation Tolerance.