Variation Tolerant On-Chip Interconnects

This book presents design techniques, analysis and implementation of high performance and power efficient, variation tolerant on-chip interconnects.  Given the design paradigm shift to multi-core, interconnect-centric designs and the increase in sources of variability and their impact in sub-100nm t...

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Detalles Bibliográficos
Clasificación:Libro Electrónico
Autor principal: Nigussie, Ethiopia Enideg (Autor)
Autor Corporativo: SpringerLink (Online service)
Formato: Electrónico eBook
Idioma:Inglés
Publicado: New York, NY : Springer New York : Imprint: Springer, 2012.
Edición:1st ed. 2012.
Colección:Analog Circuits and Signal Processing,
Temas:
Electronic circuits.
Electronics.
Microtechnology.
Microelectromechanical systems.
Electronic Circuits and Systems.
Electronics and Microelectronics, Instrumentation.
Microsystems and MEMS.
Acceso en línea:Texto Completo

MARC

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245 1 0 |a Variation Tolerant On-Chip Interconnects  |h [electronic resource] /  |c by Ethiopia Enideg Nigussie. 
250 |a 1st ed. 2012. 
264 1 |a New York, NY :  |b Springer New York :  |b Imprint: Springer,  |c 2012. 
300 |a XII, 172 p.  |b online resource. 
336 |a text  |b txt  |2 rdacontent 
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490 1 |a Analog Circuits and Signal Processing,  |x 2197-1854 
505 0 |a Introduction -- On-Chip Communication -- Interconnect Design Techniques -- Design of Delay-Insensitive Current Sensing Interconnects -- Enhancing Completion Detection Performance -- Energy Efficient Semi-Serial Interconnect -- Comparison of the Designed Interconnects -- Circuit Techniques for PVT Variation Tolerance. 
520 |a This book presents design techniques, analysis and implementation of high performance and power efficient, variation tolerant on-chip interconnects.  Given the design paradigm shift to multi-core, interconnect-centric designs and the increase in sources of variability and their impact in sub-100nm technologies, this book will be an invaluable reference for anyone concerned with the design of next generation, high-performance electronics systems. Provides comprehensive, circuit-level explanation of high-performance, energy-efficient, variation-tolerant on-chip interconnect; Describes design techniques to mitigate problems caused by variation; Includes techniques for design and implementation of self-timed on-chip interconnect, delay variation insensitive communication protocols, high speed signaling techniques and circuits, bit-width independent completion detection and process, voltage and temperature variation tolerance.                          . 
650 0 |a Electronic circuits. 
650 0 |a Electronics. 
650 0 |a Microtechnology. 
650 0 |a Microelectromechanical systems. 
650 1 4 |a Electronic Circuits and Systems. 
650 2 4 |a Electronics and Microelectronics, Instrumentation. 
650 2 4 |a Microsystems and MEMS. 
710 2 |a SpringerLink (Online service) 
773 0 |t Springer Nature eBook 
776 0 8 |i Printed edition:  |z 9781489990860 
776 0 8 |i Printed edition:  |z 9781461401322 
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830 0 |a Analog Circuits and Signal Processing,  |x 2197-1854 
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912 |a ZDB-2-ENG 
912 |a ZDB-2-SXE 
950 |a Engineering (SpringerNature-11647) 
950 |a Engineering (R0) (SpringerNature-43712) 

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