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Post-Silicon and Runtime Verification for Modern Processors
Post-Silicon and Run-Time Verification for Modern Processors surveys the state of the art and evolving directions in post-silicon and runtime verification. The volume gives an overview of the state of the art in verification, particularly current post-silicon methodologies in use in the industry, bo...
| Clasificación: | Libro Electrónico |
|---|---|
| Autores principales: | , |
| Autor Corporativo: | |
| Formato: | Electrónico eBook |
| Idioma: | Inglés |
| Publicado: |
New York, NY :
Springer US : Imprint: Springer,
2011.
|
| Edición: | 1st ed. 2011. |
| Temas: | |
| Acceso en línea: | Texto Completo |
MARC
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| 100 | 1 | |a Wagner, Ilya. |e author. |4 aut |4 http://id.loc.gov/vocabulary/relators/aut | |
| 245 | 1 | 0 | |a Post-Silicon and Runtime Verification for Modern Processors |h [electronic resource] / |c by Ilya Wagner, Valeria Bertacco. |
| 250 | |a 1st ed. 2011. | ||
| 264 | 1 | |a New York, NY : |b Springer US : |b Imprint: Springer, |c 2011. | |
| 300 | |a XVII, 224 p. |b online resource. | ||
| 336 | |a text |b txt |2 rdacontent | ||
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| 505 | 0 | |a Verification of a Modern Processor -- The Verification Universe -- Test Generation and Response Evaluation for Processors Cores in Post-Silicon -- Post-Silicon Verification of Multi-Core Processors -- Run-Time Verification Through Hardware Patching and Error Avoidance -- The Future of Post-Silicon Verification. | |
| 520 | |a Post-Silicon and Run-Time Verification for Modern Processors surveys the state of the art and evolving directions in post-silicon and runtime verification. The volume gives an overview of the state of the art in verification, particularly current post-silicon methodologies in use in the industry, both for the domain of processor pipeline design and for memory subsystems. There is also a thorough presentation of several new post-silicon verification solutions aimed at boosting the verification coverage of modern processors. The presentation of runtime verification solutions follows a similar approach. This is an area of processor design that is still in its early stages of exploration and could help accomplish the ultimate goal of complete correctness guarantees for microprocessor-based computation. The book also: · Addresses an area of hardware verification that is growing both in industry and academia · Covers hardware patching and error avoidance · Discusses multi-core processors with test generation and response evaluation The authors conclude the book with a look towards the future of late-stage verification and its growing role in the processor life-cycle. Post-Silicon and Run-Time Verification for Modern Processors will be a valuable book for researchers and engineers working in electrical engineering. | ||
| 650 | 0 | |a Electronic circuits. | |
| 650 | 0 | |a Computers. | |
| 650 | 0 | |a Computer-aided engineering. | |
| 650 | 1 | 4 | |a Electronic Circuits and Systems. |
| 650 | 2 | 4 | |a Computer Hardware. |
| 650 | 2 | 4 | |a Computer-Aided Engineering (CAD, CAE) and Design. |
| 700 | 1 | |a Bertacco, Valeria. |e author. |4 aut |4 http://id.loc.gov/vocabulary/relators/aut | |
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| 776 | 0 | 8 | |i Printed edition: |z 9781489981509 |
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