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Nanoscale Memory Repair

Yield and reliability of memories have degraded with device and voltage scaling in the nano-scale era, due to ever-increasing hard/soft errors and device parameter variations. As a result, repair techniques have been indispensable for nano-scale memories. Without these techniques, even modern MPUs/...

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Detalles Bibliográficos
Clasificación:Libro Electrónico
Autores principales: Horiguchi, Masashi (Autor), Itoh, Kiyoo (Autor)
Autor Corporativo: SpringerLink (Online service)
Formato: Electrónico eBook
Idioma:Inglés
Publicado: New York, NY : Springer New York : Imprint: Springer, 2011.
Edición:1st ed. 2011.
Colección:Integrated Circuits and Systems,
Temas:
Acceso en línea:Texto Completo
Tabla de Contenidos:
  • An Introduction to Repair Techniques: Basics of Redundancy
  • Basics of Error Checking and Correction
  • Comparison between Redundancy and ECC
  • Repairs of Logic Circuits
  • Redundancy: Models of Fault Distribution
  • Yield Improvement through Redundancy
  • Replacement Schemes
  • Intra-Subarray Replacement
  • Inter-Subarray Replacement
  • Subarray Replacement
  • Devices for Storing Addresses
  • Testing for Redundancy
  • Error Checking and Correction: Linear Algebra and Linear Codes
  • Galois Field
  • Error-Correcting Codes
  • Coding and Decoding Circuits
  • Theoretical Reduction in Soft-Error and Hard-Error Rates
  • Application of ECC
  • Testing for ECC
  • Synergistic Effect of Redundancy and ECC: Repair of Bit Faults using Synergistic Effect
  • Application of Synergistic Effect.