Low-Power Variation-Tolerant Design in Nanometer Silicon

Low-Power Variation-Tolerant Design in Nanometer Silicon Edited by: Swarup Bhunia Saibal Mukhopadhyay Design considerations for low-power operations and robustness with respect to variations typically impose contradictory requirements. Low-power design techniques such as voltage scaling, dual-thresh...

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Detalles Bibliográficos
Clasificación:Libro Electrónico
Autor Corporativo: SpringerLink (Online service)
Otros Autores: Bhunia, Swarup (Editor ), Mukhopadhyay, Saibal (Editor )
Formato: Electrónico eBook
Idioma:Inglés
Publicado: New York, NY : Springer US : Imprint: Springer, 2011.
Edición:1st ed. 2011.
Temas:
Electronic circuits.
Computer-aided engineering.
Electronic Circuits and Systems.
Computer-Aided Engineering (CAD, CAE) and Design.
Acceso en línea:Texto Completo
Tabla de Contenidos:
  • Introduction and Motivation
  • Background on Power Dissipation
  • Background on Parameter Variations
  • Low power Logic Design under Variations
  • Low Power Memory Design under Variations
  • System and Architecture Level Design
  • Emerging Challenges and Solution Approach
  • Conclusion and Discussion.

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