Analog Layout Synthesis A Survey of Topological Approaches /

Analog Layout Synthesis: A Survey of Topological Approaches Edited by: Helmut E. Graeb Analog components appear on 75% of all chips, and cause 40% of the design effort and 50% of the re-designs. Due to increasing functional complexity of systems-on-chip, the difficulties in analog design and the lac...

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Detalles Bibliográficos
Clasificación:Libro Electrónico
Autor Corporativo: SpringerLink (Online service)
Otros Autores: Graeb, Helmut E. (Editor )
Formato: Electrónico eBook
Idioma:Inglés
Publicado: New York, NY : Springer US : Imprint: Springer, 2011.
Edición:1st ed. 2011.
Temas:
Electronic circuits.
Computer-aided engineering.
Electronic Circuits and Systems.
Computer-Aided Engineering (CAD, CAE) and Design.
Acceso en línea:Texto Completo
Tabla de Contenidos:
  • Device-level topological placement with symmetry constraints
  • Hierarchical placement with layout constraints
  • Enhanced shape functions for deterministic analog placement
  • Free-Shape Routing for Analog and RF circuits
  • Closing the gap between electrical and physical design of analog circuits: the layout-aware solution
  • Analog layout retargeting
  • Template-driven analog layout automation
  • Place and route of analog circuits.

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