Low Power Hardware Synthesis from Concurrent Action-Oriented Specifications

Low Power Hardware Synthesis from Concurrent Action-Oriented Specifications Gaurav Singh Sandeep K. Shukla This book introduces novel techniques for generating low-power hardware from a high-level description of a design in terms of Concurrent Action-Oriented Specifications (CAOS). It also describes...

Descripción completa

Detalles Bibliográficos
Clasificación:Libro Electrónico
Autores principales: Singh, Gaurav (Autor), Shukla, Sandeep Kumar (Autor)
Autor Corporativo: SpringerLink (Online service)
Formato: Electrónico eBook
Idioma:Inglés
Publicado: New York, NY : Springer New York : Imprint: Springer, 2010.
Edición:1st ed. 2010.
Temas:
Electronic circuits.
Computer-aided engineering.
Electronic Circuits and Systems.
Computer-Aided Engineering (CAD, CAE) and Design.
Acceso en línea:Texto Completo

MARC

LEADER 00000nam a22000005i 4500
001 978-1-4419-6481-6
003 DE-He213
005 20220120091310.0
007 cr nn 008mamaa
008 100726s2010 xxu| s |||| 0|eng d
020 |a 9781441964816  |9 978-1-4419-6481-6 
024 7 |a 10.1007/978-1-4419-6481-6  |2 doi 
050 4 |a TK7867-7867.5 
072 7 |a TJFC  |2 bicssc 
072 7 |a TEC008010  |2 bisacsh 
072 7 |a TJFC  |2 thema 
082 0 4 |a 621.3815  |2 23 
100 1 |a Singh, Gaurav.  |e author.  |4 aut  |4 http://id.loc.gov/vocabulary/relators/aut 
245 1 0 |a Low Power Hardware Synthesis from Concurrent Action-Oriented Specifications  |h [electronic resource] /  |c by Gaurav Singh, Sandeep Kumar Shukla. 
250 |a 1st ed. 2010. 
264 1 |a New York, NY :  |b Springer New York :  |b Imprint: Springer,  |c 2010. 
300 |a XXX, 154 p.  |b online resource. 
336 |a text  |b txt  |2 rdacontent 
337 |a computer  |b c  |2 rdamedia 
338 |a online resource  |b cr  |2 rdacarrier 
347 |a text file  |b PDF  |2 rda 
505 0 |a Related Work -- Background -- Low-Power Problem Formalization -- Heuristics for Power Savings -- Complexity Analysis of Scheduling in CAOS-Based Synthesis -- Dynamic Power Optimizations -- Peak Power Optimizations -- Verifying Peak Power Optimizations Using SPIN Model Checker -- Epilogue. 
520 |a Low Power Hardware Synthesis from Concurrent Action-Oriented Specifications Gaurav Singh Sandeep K. Shukla This book introduces novel techniques for generating low-power hardware from a high-level description of a design in terms of Concurrent Action-Oriented Specifications (CAOS). It also describes novel techniques for formal verification of such designs. It will provide the readers with definitions of various power optimization and formal verification problems related to CAOS-based synthesis, necessary background concepts, techniques to generate hardware according to the design's power requirements, and detailed experimental results obtained by applying the techniques introduced on realistic hardware designs. •Presents detailed analysis of various power optimization problems associated with high-level synthesis, as well as novel techniques for reducing power consumption of hardware designs at a higher level of abstraction; •Discusses various formal verification issues associated with synthesizing different possible versions of a hardware design (differing in their latency, area, and/or power consumption); •Includes detailed experimental results obtained by applying the techniques introduced on benchmark hardware designs. 
650 0 |a Electronic circuits. 
650 0 |a Computer-aided engineering. 
650 1 4 |a Electronic Circuits and Systems. 
650 2 4 |a Computer-Aided Engineering (CAD, CAE) and Design. 
700 1 |a Shukla, Sandeep Kumar.  |e author.  |4 aut  |4 http://id.loc.gov/vocabulary/relators/aut 
710 2 |a SpringerLink (Online service) 
773 0 |t Springer Nature eBook 
776 0 8 |i Printed edition:  |z 9781441964809 
776 0 8 |i Printed edition:  |z 9781489987020 
776 0 8 |i Printed edition:  |z 9781441964823 
856 4 0 |u https://doi.uam.elogim.com/10.1007/978-1-4419-6481-6  |z Texto Completo 
912 |a ZDB-2-ENG 
912 |a ZDB-2-SXE 
950 |a Engineering (SpringerNature-11647) 
950 |a Engineering (R0) (SpringerNature-43712) 

Ejemplares similares